Method and apparatus for end-point detection

ABSTRACT

An apparatus for detecting the end-point of an electropolishing process of a metal layer formed on a wafer ( 1004 ) includes an end-point detector. The end-point detector is disposed adjacent the nozzle ( 1008 ) used to electropolish the wafer. In one embodiment, the end-point detector is configured to measure the optical reflectivity of the portion of the wafer being electropolished.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a 35 U.S.C. §371 National Stage of InternationalPatent Application No. PCT/US01/14652, filed May 3, 2001, titled METHODAND APPARATUS FOR END-POINT DETECTION, which is a continuation of U.S.application Ser. No. 09/570,566, filed May 12, 2000, titled METHOD ANDAPPARATUS FOR END-POINT DETECTION, now issued as U.S. Pat. No.6,447,668, which is a continuation-in-part of U.S. application Ser. No.09/497,894, filed Feb. 4, 2000, titled METHODS AND APPARATUS FORELECTROPOLISHNG METAL INTERCONNECTIONS ON SEMICONDUCTOR DEVICES, nowissued as U.S. Pat. No. 6,440,295, which is a continuation ofPCT/US99/15506, filed Jul. 8, 1999, titled METHODS AND APPARATUS FORELECTROPOLISHING METAL INTERCONNECTIONS ON SEMICONDUCTOR DEVICES, whichclaims benefit under 35 U.S.C. §119(e) of U.S. Provisional ApplicationSer. No. 60/092,316, filed Jul. 9, 1998, titled METHODS AND APPARATUSFOR ELECTROPOLISHING METAL INTERCONNECTIONS ON SEMICONDUCTOR DEVICES.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to methods and apparatus forelectropolishing metal layers on semiconductor wafers. Moreparticularly, the present invention relates to a system forelectropolishing interconnections in semiconductor devices formed onsemiconductor wafers.

2. Description of the Related Art

In general, semiconductor devices are manufactured or fabricated ondisks of semiconducting materials called wafers or slices. Moreparticularly, wafers are initially sliced from a silicon ingot. Thewafers then undergo multiple masking, etching, and deposition processesto form the electronic circuitry of semiconductor devices.

During the past decades, the semiconductor industry has increased thepower of semiconductor devices in accordance with Moore's law, whichpredicts that the power of semiconductor devices will double every 18months. This increase in the power of semiconductor devices has beenachieved in part by decreasing the feature size (i.e., the smallestdimension present on a device) of these semiconductor devices. In fact,the feature size of semiconductor devices has quickly gone from 0.35microns to 0.25 microns, and now to 0.18 microns. Undoubtedly, thistrend toward smaller semiconductor devices is likely to proceed wellbeyond the sub-0.18 micron stage.

However, one potential limiting factor to developing more powerfulsemiconductor devices is the increasing signal delays at theinterconnections (the lines of conductors, which connect elements of asingle semiconductor device and/or connect any number of semiconductordevices together). As the feature size of semiconductor devices hasdecreased, the density of interconnections on the devices has increased.However, the closer proximity of interconnections increases theline-to-line capacitance of the interconnections, which results ingreater signal delay at the interconnections. In general,interconnection delays have been found to increase with the square ofthe reduction in feature size. In contrast, gate delays (i.e., delay atthe gates or mesas of semiconductor devices) have been found to increaselinearly with the reduction in feature size.

One conventional approach to compensate for this increase ininterconnection delay has been to add more layers of metal. However,this approach has the disadvantage of increasing production costsassociated with forming the additional layers of metal. Furthermore,these additional layers of metal generate additional heat, which can beadverse to both chip performance and reliability.

Consequently, the semiconductor industry has started to use copperrather than aluminum to form the metal interconnections. One advantageof copper is that it has greater conductivity than aluminum. Also,copper is less resistant to electromigration (meaning that a line formedfrom copper will have less tendency to thin under current load) thanaluminum. However, one significant disadvantage to using copper has beenits tendency to bleed into the silicon substrate, thus contaminating thesemiconductor device.

Additionally, before copper can be widely used for interconnections, newprocessing techniques are required. More particularly, in a conventionaldamascene process, metal is patterned within canal-like trenches and/orvias. The deposited metal is then polished back using chemicalmechanical polishing (“CMP”). In general, depending on theinterconnection structure design, anywhere from half a micron to 1.5millimeters of metal needs to be polished. Polishing such a largequantity of metal using conventional CMP requires a long polishing timeand consumes a large quantity of slurry, which leads to highmanufacturing costs.

SUMMARY OF THE INVENTION

The present invention relates to an end-point detector for detecting theend-point of an electropolishing process of a metal layer formed on awafer. The end-point detector is disposed adjacent the nozzle used toelectropolish the wafer. In one embodiment, the end-point detector isconfigured to measure the optical reflectivity of the portion of thewafer being electropolished.

DESCRIPTION OF THE DRAWING FIGURES

The subject matter of the present invention is particularly pointed outand distinctly claimed in the concluding portion of the specification.The present invention, however, both as to organization and method ofoperation, may best be understood by reference to the followingdescription taken in conjunction with the claims and the accompanyingdrawing figures, in which like parts may be referred to by likenumerals:

FIGS. 1A–1D are cross-section views of a semiconductor wafer inaccordance with various aspects of the present invention;

FIG. 2 is a flow chart for processing wafers in accordance with variousaspects of the present invention;

FIGS. 3A–3C are schematic top, cross section, and side views,respectively, of a wafer processing tool in accordance with variousaspects of the present invention;

FIGS. 4A–4D are cross-section views of another wafer in accordance withvarious aspects of the present invention;

FIG. 5 is another flow chart for processing wafers in accordance withvarious aspects of the present invention;

FIGS. 6A–6C are schematic top, cross section, and side views,respectively, of another wafer processing tool in accordance withvarious aspects of the present invention;

FIG. 7A is a top view of a portion of an electropolishing apparatus inaccordance with various aspects of the present invention;

FIG. 7B is a view, partly in cross section, taken along the line 7B—7Bin FIG. 7A, and partly in block diagram form, of the electropolishingapparatus shown in FIG. 7A;

FIG. 8 is a plot of various waveforms, which may be used in conjunctionwith the electropolishing apparatus shown in FIG. 7A;

FIG. 9A–9D are top views of a portion of alternative embodiments ofelectropolishing apparatus in accordance with various aspects of thepresent invention;

FIG. 10 is a plot of various waveforms depicting a portion of anelectropolishing process in accordance with various aspects of thepresent invention;

FIG. 11A is a top view of a portion of another alternative embodiment inaccordance with various aspects of the present invention;

FIG. 11B is a view, partly in cross section, taken along the line11B—11B in FIG. 11A, and partly in block diagram form, of thealternative embodiment shown in FIG. 11A;

FIG. 12A is a top view of a portion of a second alternative embodimentin accordance with various aspects of the present invention;

FIG. 12B is a view, partly in cross section, taken along the line12B—12B in FIG. 12A, and partly in block diagram form, of thealternative embodiment shown in FIG. 12A;

FIG. 13A is a top view of a portion of a third alternative embodiment inaccordance with various aspects of the present invention;

FIG. 13B is a view, partly in cross section, taken along the line13B—13B in FIG. 13A, and partly in block diagram form, of thealternative embodiment shown in FIG. 13A;

FIG. 14A is a top view of a portion of a fourth alternative embodimentin accordance with various aspects of the present invention;

FIG. 14B is a view, partly in cross section, taken along the line14B—14B in FIG. 14A, and partly in block diagram form, of thealternative embodiment shown in FIG. 14A;

FIG. 15 is a cross section view of a fifth alternative embodiment inaccordance with various aspects of the present invention;

FIG. 16A is a top view of a portion of a sixth alternative embodiment inaccordance with various aspects of the present invention;

FIG. 16B is a view, partly in cross section, taken along the line16B—16B in FIG. 16A, and partly in block diagram form, of thealternative embodiment shown in FIG. 16A;

FIG. 17A is a top view of a portion of a seventh alternative embodimentin accordance with various aspects of the present invention;

FIG. 17B is a view, partly in cross section, taken along the line17B—17B in FIG. 17A, and partly in block diagram form, of thealternative embodiment shown in FIG. 17A;

FIG. 18A is a cross section view of an eighth alternative embodiment inaccordance with various aspects of the present invention;

FIG. 18B is a cross section view of a ninth alternative embodiment inaccordance with various aspects of the present invention;

FIG. 19A is a cross section view of a tenth alternative embodiment inaccordance with various aspects of the present invention;

FIG. 19B is a cross section view of an eleventh alternative embodimentin accordance with various aspects of the present invention;

FIG. 20A is a top view of a portion of a twelfth alternative embodimentin accordance with various aspects of the present invention;

FIG. 20B is a view, partly in cross section, taken along the line20B—20B in FIG. 20A, and partly in block diagram form, of thealternative embodiment shown in FIG. 20A;

FIG. 21A is a top view of a portion of a thirteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 21B is a top view of a portion of a fourteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 22A is a top view of a portion of a fifteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 22B is a view, partly in cross section, taken along the line22B—22B in FIG. 22A, and partly in block diagram form, of thealternative embodiment shown in FIG. 22A;

FIG. 23A is a top view of a portion of a sixteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 23B is a top view of a portion of a seventeenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 23C is a top view of a portion of an eighteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 24A is a top view of a portion of a nineteenth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 24B is a view, partly in cross section, taken along the line24B—24B in FIG. 24A, and partly in block diagram form, of thealternative embodiment shown in FIG. 24A;

FIG. 25 is a top view of a portion of a twentieth alternative embodimentin accordance with various aspects of the present invention;

FIG. 26 is a top view of a portion of a twenty-first alternativeembodiment in accordance with various aspects of the present invention;

FIG. 27A is a top view of a portion of a twenty-second alternativeembodiment in accordance with various aspects of the present invention;

FIG. 27B is a top view of a portion of a twenty-third alternativeembodiment in accordance with various aspects of the present invention;

FIG. 27C is a top view of a portion of a twenty-fourth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 28A is a top view of a portion of a twenty-fifth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 28B is a view, partly in cross section, taken along the line28B—28B in FIG. 28A, and partly in block diagram form, of thealternative embodiment shown in FIG. 28A;

FIG. 29A is a top view of a portion of a twenty-sixth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 29B is a view, partly in cross section, taken along the line29B—29B in FIG. 29A, and partly in block diagram form, of thealternative embodiment shown in FIG. 29A;

FIG. 30A is a top view of a portion of a twenty-seventh alternativeembodiment in accordance with various aspects of the present invention;

FIG. 30B is a view, partly in cross section, taken along the line30B—30B in FIG. 30A, and partly in block diagram form, of thealternative embodiment shown in FIG. 30A;

FIG. 31A is a top view of a portion of a twenty-eighth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 31B is a view, partly in cross section, taken along the line31B—31B in FIG. 31A, and partly in block diagram form, of thealternative embodiment shown in FIG. 31A;

FIG. 32A is a cross section view of a portion of a twenty-ninthalternative embodiment in accordance with various aspects of the presentinvention;

FIG. 32B is a cross section view of a portion of a thirtieth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 32C is a cross section view of a portion of a thirty-firstalternative embodiment in accordance with various aspects of the presentinvention;

FIG. 32D is a cross section view of a portion of a thirty-secondalternative embodiment in accordance with various aspects of the presentinvention;

FIG. 33 is a top view of a wafer undergoing electropolishing inaccordance with various aspects of the present invention;

FIG. 34A is a top view of a portion of a thirty-third alternativeembodiment in accordance with various aspects of the present invention;

FIG. 34B is a top view of a portion of a thirty-fourth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 34C is a top view of a portion of a thirty-fifth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 34D is a top view of a portion of a thirty-sixth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 35A is a cross section view of a portion of a thirty-seventhalternative embodiment in accordance with various aspects of the presentinvention;

FIG. 35B is a cross section view of a portion of a thirty-eighthalternative embodiment in accordance with various aspects of the presentinvention;

FIG. 36A is a top view of a portion of a thirty-ninth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 36B is a view, partly in cross section, taken along the line36B—36B in FIG. 36A, and partly in block diagram form, of thealternative embodiment shown in FIG. 36A;

FIG. 37 is a set of waveforms depicting a portion of an electropolishingprocess in accordance with various aspects of the present invention;

FIG. 38A is a top view of a portion of a fortieth alternative embodimentin accordance with various aspects of the present invention;

FIG. 38B is a view, partly in cross section, taken along the line38B—38B in FIG. 38A, and partly in block diagram form, of thealternative embodiment shown in FIG. 38A;

FIG. 39A is a top view of a portion of a forty-first alternativeembodiment in accordance with various aspects of the present invention;

FIG. 39B is a view, partly in cross section, taken along the line39B—39B in FIG. 39A, and partly in block diagram form, of thealternative embodiment shown in FIG. 39A;

FIG. 40A is a top view of a portion of a forty-second alternativeembodiment in accordance with various aspects of the present invention;

FIG. 40B is a view, partly in cross section, taken along the line40B—40B in FIG. 40A, and partly in block diagram form, of thealternative embodiment shown in FIG. 40A;

FIG. 41 is a set of waveform diagrams depicting a portion of anelectropolishing process in accordance with various aspects of thepresent invention;

FIG. 42 is additional sets of waveforms, which may be used inconjunction with the present invention;

FIG. 43A is a top view of a portion of a forty-third alternativeembodiment in accordance with various aspects of the present invention;

FIG. 43B is a view, partly in cross section, taken along the line43B—43B in FIG. 43A, and partly in block diagram form, of thealternative embodiment shown in FIG. 43A;

FIG. 44A is a top view of a portion of a forty-fourth alternativeembodiment in accordance with various aspects of the present invention;

FIG. 44B is a view, partly in cross section, taken along the line44B—44B in FIG. 44A, and partly in block diagram form, of thealternative embodiment shown in FIG. 44A;

FIG. 45 is a view, partly in cross section, and partly in block diagramform, of a forty-fifth alternative embodiment in accordance with variousaspects of the present invention;

FIG. 46 is a view, partly in cross section, and partly in block diagramform, of a forty-sixth alternative embodiment in accordance with variousaspects of the present invention;

FIGS. 47A–47C are schematic top, cross section, and side views,respectively, of another embodiment of a wafer processing tool inaccordance with various aspects of the present invention;

FIG. 48 is a flow chart depicting the operation of a portion of softwarefor controlling a wafer processing tool in accordance with variousaspects of the present invention;

FIGS. 49A–49C are schematic top, cross section, and side views,respectively, of still another embodiment of a wafer processing tool inaccordance with various aspects of the present invention;

FIG. 50 is a schematic top view of a portion of yet another embodimentof a wafer processing tool in accordance with various aspects of thepresent invention;

FIG. 51 is a schematic top view of a portion of another embodiment of awafer-processing tool in accordance with various aspects of the presentinvention;

FIGS. 52A–52C are schematic top, cross section, and side views,respectively, of still another embodiment of a wafer processing tool inaccordance with various aspects of the present invention;

FIG. 53 is a waveform depicting a portion of a wafer processingoperation in accordance with various aspects of the present invention;

FIG. 54A is a top view of a portion of a forty-seventh alternativeembodiment in accordance with various aspects of the present invention;

FIG. 54B is a view, partly in cross section, taken along the line54B—54B in FIG. 54A, and partly in block diagram form, of thealternative embodiment shown in FIG. 54A;

FIG. 55 is a graph depicting the relationship between current andvoltage in a pulsed power supply;

FIG. 56 is a graph depicting the relationship between current andvoltage in a DC power supply;

FIG. 57 is a graph depicting the relationship between resistance andpolishing time;

FIG. 58 is a side view of a portion of an end-point detection system;

FIG. 59 is a graph depicting the relationship between reflection rateand polishing time;

FIG. 60 is a top view of a portion of an end-point detection system;

FIG. 61 is a top view of a portion of another end-point detectionsystem;

FIG. 62 is a top view of a portion of still another end-point detectionsystem;

FIGS. 63A and 64B are schematics of various configurations of end-pointdetectors;

FIGS. 64A through 64D are schematics of various configurations ofend-point detectors;

FIGS. 65A through 65E are cross-sectional views of various end-pointdetectors;

FIGS. 66A through 66E are cross sectional views of various nozzles;

FIGS. 67A and 67B are schematic side and top views, respectively, of awafer processing tool;

FIG. 68A is a front perspective view of an embodiment of an electrolessplating module;

FIG. 68B is a top cross section view of the embodiment shown in FIG.68A;

FIG. 69A is a front perspective view of another embodiment of anelectroless plating module;

FIG. 69B is a top cross section view of the embodiment shown in FIG.69A;

FIGS. 70A through 70C are top, front cross section, and side crosssection views, respectively, of a wafer processing tool;

FIGS. 71A through 71C are top, front cross section, and side crosssection views, respectively, of another wafer processing tool; and

FIGS. 72A through 72C are top and two cross sectional views,respectively, of still another wafer processing tool.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

In order to provide a more thorough understanding of the presentinvention, the following description sets forth numerous specificdetails, such as specific material, parameters, and the like. It shouldbe recognized, however, that such description is not intended as alimitation on the scope of the present invention, but is insteadprovided to enable a full and complete description of the exemplaryembodiments.

With reference to FIG. 1A, a semiconductor wafer 31, according to oneaspect of the present invention, suitably includes a substrate layer124. More particularly, in an exemplary embodiment of the presentinvention, substrate layer 124 preferably includes silicon. It should berecognized, however, that substrate layer 124 can include varioussemiconductor materials, such as gallium arsenide and the like,depending on the particular application.

Semiconductor wafer 31, according to another aspect of the presentinvention, suitably includes a dielectric layer 123 formed on top ofsubstrate layer 124. In the present exemplary embodiment, dielectriclayer 123 preferably includes silicon dioxide (SiO2). Dielectric layer123 can be formed on substrate layer 124 using any convenient depositionmethod, such as chemical vapor deposition, evaporation, sputtering, andthe like.

Additionally, dielectric layer 123 can include various materials havingdielectric constant (“K”) values lower than that of SiO2, these variousmaterials being generally referred to as low-K materials, such ashydrogen-silsesquioxane (HSQ), Xerogel, polymer, aerogel, and the like.In comparison to SiO2, which has a dielectric constant of about 4.2, HSQhas a dielectric constant of about 3.0 to 2.5, and Xerogel has adielectric constant of about 2.0. In general, a low-K material providesbetter electrical isolation. Therefore, the use of a low-K material asdielectric layer 123 can facilitate the formation of semiconductordevices with smaller feature sizes.

After dielectric layer 123 is suitably formed on substrate layer 124,the circuitry for semiconductor devices is suitably formed using anyconvenient process. In the present exemplary embodiment, a damasceneprocess is preferably used. Accordingly, trenches (also known as gaps)125 and gates (also known as mesas) 126 are formed in dielectric layer123 using any convenient patterning method, such as photomasking,photolithography, microlithography, and the like.

Next, a barrier layer 122, according to still another aspect of thepresent invention, is suitably formed on top of dielectric layer 123. Asdepicted in FIG. 1A, barrier layer 122 also suitably lines the walls oftrenches 125. As will be described below, when a metal layer 121, whichincludes copper, is formed on top of dielectric layer 123, barrier layer122 suitably prevents the copper in metal layer 121 from diffusing intodielectric layer 123. Accordingly, in the present exemplary embodiment,barrier layer 122 preferably includes material resistant to thediffusion of copper, such as titanium, tantalum, tungsten,titanium-nitride, tantalum-nitride, tungsten-nitride, and the like.Barrier layer 122 can be deposited using any convenient depositionmethod, such as physical vapor deposition (PVD), chemical vapordeposition (CVD), and the like. It should be recognized, however, thatbarrier layer 122 can be omitted in some applications. For example, whendielectric layer 123 is formed from a material, which is resistant todiffusion of copper, or when the diffusion of copper into dielectriclayer 123 will not adversely affect the performance of the semiconductordevice.

As alluded to above, depending on the particular application, metallayer 121, according to yet another aspect of the present invention, canbe suitably formed on top of barrier layer 122 or formed on top ofdielectric layer 123. Additionally, metal layer 121 is suitablydeposited within trench 125. In the present exemplary embodiment, metallayer 121 preferably includes copper. Accordingly, metal layer 121 isformed on top of barrier layer 122 to suitably prevent the diffusion ofcopper from metal layer 121 into dielectric layer 123. Although thepresent invention is particularly well suited for use with metal layer121 including copper, it should be recognized that metal layer 121 caninclude various electrically conductive materials, such as nickel,chromium, zinc, cadmium, silver, gold, rhodium, palladium, platinum,tin, lead, iron, indium, and the like.

Metal layer 121 can be formed on barrier layer 122 or on dielectriclayer 123 using any convenient method, such as PVD, CVD, and the like.Additionally, metal layer 121 can be formed using an electroplatingprocessing, which is described in copending application Ser. No.09/232,864, entitled PLATING APPARATUS AND METHOD, filed on Jan. 15,1999, the entire content of which is incorporated herein by reference.

With reference now to FIG. 1B, metal layer 121, formed on top of mesas126, according to another aspect of the present invention, is suitablyelectropolished. The present invention can be advantageously used in adamascene process, in which the circuitry of a semiconductor device ispatterned into trenches or gaps. It should be recognized, however, thatthe present invention can be used in conjunction with various otherprocesses without deviating from the spirit and/or scope of the presentinvention.

With reference now to FIGS. 7A and 7B, a wafer electropolisher 50,according to various aspects of the present invention, is shown. In anexemplary embodiment of the present invention, wafer electropolisher 50preferably includes polishing receptacle 100, which is divided into sixsections 111, 112, 113, 114, 115 and 116 by section walls 109, 107, 105,103 and 101. As will be described in greater detail below, it should berecognized that polishing receptacle 100 can be divided into any numberof sections by any suitable number of section walls.

Polishing receptacle 100 and section walls 109, 107, 105, 103 and 101are suitably formed from any convenient material electrically insulatedand resistant to acid and corrosion, such as polytetrafluoroethylene(commercially known as TEFLON), PolyVinyl Chloride (PVC),PolyVinylindene Fluoride (PVDF), Polypropylene, and the like. In thepresent exemplary embodiment, polishing receptacle 100 and section walls109, 107, 105, 103 and 101 are preferably formed from PVDF. It should berecognized, however, that polishing receptacle and each section wall109, 107, 105, 103 and 101 can be formed from different materialsdepending on the particular application.

As depicted in FIG. 7B, in the present exemplary embodiment, electrolyte34 flows into polishing receptacle 100 through inlets 4, 6 and 8suitably formed in sections 111, 113 and 115, respectively. Moreparticularly, a pump 33 suitably pumps electrolyte 34 from anelectrolyte reservoir 36 to a pass filter 32 and into Liquid Mass FlowControllers (LMFCs) 21, 22 and 23. Pass filter 32 suitably filterscontaminants from electrolyte 34. In this manner, contaminants areprevented from entering polishing receptacle 100 and from clogging LMFCs21, 22 and 23. In the present exemplary embodiment, pass filter 32suitably removes particles larger than about 0.05 micrometer but smallerthan about 0.1 micrometers. It should be recognized, however, thatvarious filtering systems can be used depending on the particularapplication. Additionally, although filtering contaminants isadvantageous, pass filter 32 can be omitted from wafer polisher 50without deviating from the spirit and/or scope of the present invention.

Electrolyte 34 can include any convenient electroplating fluid, such asphosphoric acid, and the like. In the present exemplary embodiment,electrolyte 34 preferably includes orthophosphoric acid (H2PO4) having aconcentration between about 60 percent by weight and about 85 percent byweight, and preferably about 76 percent by weight. Additionally,electrolyte 34 preferably includes orthophosphoric acid having about 1percent aluminum metal (against weight of the acid). It should berecognized, however, that the concentration and composition ofelectrolyte 34 can vary depending on the particular application.

Pump 33 can include any convenient hydraulic pump, such as a centrifugalpump, a diaphragm pump, a bellow pump, and the like. Additionally, pump33 is suitably resistant to acid, corrosion, and contamination. In thepresent exemplary embodiment, pump 33 includes a diaphragm pump. Itshould be recognized, as will be depicted and described below inconjunction with alternative embodiments, that two or more pumps 33 canbe used without deviating from the spirit and/or scope of the presentinvention. Additionally, it should be recognized that electrolyte 34 canbe suitably delivered to polishing receptacle 100 through inlets 4, 6and 8, without pump 34. For example, electrolyte 34 can be maintained atpressure within electrolyte reservoir 36. Alternatively, the supplylines between electrolyte reservoir 36 and inlets 4, 6 and 8 can bemaintained at pressure.

LMFCs 21, 22 and 23 can include any convenient mass flow controller,preferably resistant to acid, corrosion, and contamination.Additionally, LMFCs 21, 22 and 23 deliver electrolyte 34 at set flowrates to sections 115, 113 and 111, respectively. Additionally, LMFCs21, 22 and 23 can suitably deliver electrolyte 34 at flow ratesproportionate to the volumes of sections 115, 113 and 111. For example,if section 115 is larger in volume than section 113, then it can beadvantageous for LMFC 21 to deliver electrolyte 34 at a greater flowrate than LMFC 22. In the present exemplary embodiment, LMFCs 21, 22 and23 are preferably configured to deliver electrolyte 34 at a flow ratebetween about 0.5 liters per minute and about 40 liters per minute.

Additionally, in the present exemplary embodiment, a separate LMFCdelivers electrolyte into each section 115, 113 and 111. As will bedescribed in greater detail below, this configuration facilitateselectropolishing of discrete portions of wafer 31. It should berecognized, however, that any number of LMFCs can be used depending onthe particular application. Additionally, as will be described anddepicted below in conjunction with alternative embodiments, electrolyte34 can be delivered into polishing receptacle 100 from pump 33 withoutusing LMFCs 21, 22 and 23.

In accordance with various aspects of the present invention, waferpolisher 50 suitably includes cathodes 1, 2 and 3 disposed withinsections 111, 113 and 115, respectively. As will be described in greaterdetail below, although the present exemplary embodiment includes threecathodes, any number of cathodes, whether fewer or greater than three,can be used without deviating from the present invention. In general,the more cathodes used, the better film uniformity can be expected.However, the more cathodes used, the greater the cost. Accordingly,considering the trade off between performance and cost, the preferrednumber of cathodes can be from about 7 to about 20 for electropolishing200-millimeter wafers, and from about 10 to about 30 forelectropolishing 300-millimeter wafers.

Additionally, cathodes 1, 2 and 3 can include any convenientelectrically conducting material, such as copper, lead, platinum, andthe like. During the electroplating period, some of the metal ions,which migrate out of metal layer 121, can accumulate on cathodes 1, 2and 3. Accordingly, cathodes 1, 2 and 3 can be suitably replaced at anyappropriate time. For example, cathodes 1, 2 and 3 can be suitablyreplaced after processing about 100 wafers.

Alternatively, a deplating process for cathodes 1, 2 and 3 can besuitably performed. For example, as will be described in greater detailbelow, in accordance with various aspects of the present invention, whencathodes 1, 2 and 3 are charged positively and wafer 31 is chargednegatively, then wafer 31 is suitably electroplated rather thanelectropolished. In this manner, wafer 31 can be suitably electroplatedwith the buildup of metal on cathodes 1, 2 and 3 to suitably deplatecathodes 1, 2 and 3. Although under the conditions described above,cathodes 1, 2 and 3 would function as anodes, for the sake ofconsistency and convenience, they will continue to be referred to ascathodes.

In the present exemplary embodiment, metal layer 121 includes copper.Accordingly, as described above, during the electropolishing process,some of the copper ions from metal layer 121 migrate to electroplatecathodes 1, 2 and 3. In the deplating process described above, a wafer31 can be suitably electroplated with the buildup of copper on cathodes1, 2 and 3. However, when cathodes 1, 2 and 3 are formed from copper,cathodes 1, 2 and 3 can dissolve during the deplating process. In thismanner, cathodes 1, 2 and 3 can become deformed during the deplatingprocess. Accordingly, in accordance with various aspects of the presentinvention, cathodes 1, 2 and 3 can be suitably formed from materials,which are resistant to being dissolved during the deplating process. Forexample, cathodes 1, 2 and 3 can be suitably formed from platinum.Alternatively, cathodes 1, 2 and 3 can be suitably formed from titaniumsuitably coated with a layer of platinum, preferably with a coatingthickness of about 50 microns to about 400 microns.

In the present exemplary embodiment, a wafer chuck 29 suitably holds andpositions wafer 31 within polishing receptacle 100. More particularly,wafer 31 is suitably positioned above the tops of section walls 101,103, 105, 107 and 109 to form a gap to facilitate the flow ofelectrolyte 34 between the bottom surface of wafer 31 and the tops ofsection walls 101, 103, 105, 107 and 109. In the present exemplaryembodiment, wafer 31 is suitably positioned above the tops of sectionwalls 101, 103, 105, 107 and 109 to form a gap of about 2 millimeters toabout 20 millimeters.

After wafer 31 is suitably positioned within polishing receptacle 100,cathodes 1, 2 and 3 are electrically connected to power supplies 13, 12and 11, respectively. Additionally, wafer 31 is electrically connectedto power supplies 13, 12 and 11. In this manner, when electrolyte 34flows between the bottom surface of wafer 31 and the tops of sectionwalls 101, 103, 105, 107 and 109, an electrical circuit is formed. Moreparticularly, cathodes 1, 2 and 3 are electrically charged to havenegative electric potential in comparison to wafer 31. In response tothis negative electric potential at cathodes 1, 2 and 3, metal ions thenmigrate away from wafer 31, thus electropolishing wafer 31. However,when the polarity of the circuit is reversed (i.e., cathodes 1, 2 and 3become anodes), metal ions migrate toward wafer 31, thus electroplatingwafer 31.

In this manner, selective portions of wafer 31 can be suitablyelectropolished and electroplated by controlling the polarity ofcathodes 1, 2 and 3, and by controlling the portions of wafer 31contacted by electrolyte 34. FIG. 33 depicts the selectiveelectropolishing of wafer 31 in accordance with various aspects of thepresent invention. With reference to FIG. 33, wafer area 280 has beenelectropolished, area 284 is being electropolished, and wafer area 282has not been polished.

With reference again to FIGS. 7A and 7B, in general, the polishingcurrent density determines the rate at which metal ions migrate to orfrom wafer 31. Accordingly, the higher the polishing current density,the greater the electropolishing or electroplating rate. In the presentexemplary embodiment, a current density of about 0.1 amperes perdecimeter-squared (A/dm²) to about 40 amperes per decimeter-squared(A/dm²), and preferably about 10 amperes per decimeter-squared (A/dm²),can be used. It should be recognized, however, that various currentdensities can be used depending on the particular application.

Furthermore, power supplies 13, 12 and 11 can apply different currentdensities to cathodes 1, 2 and 3. For example, the current applied bypower supplies 13, 12 and 11 can be set proportional to the surface areaof wafer 31 that is covered by the corresponding cathodes. Accordingly,if the surface area of wafer 31 covered by cathode 3 is larger than thatcovered cathode 2, power supply 11 can be set to apply more current thanpower supply 12. In this manner, the rate of electropolishing can becontrolled to facilitate a more uniform etching of the surface of wafer31. It should be recognized that the same principle can also be used tofacilitate a more uniform electroplating of the surface of wafer 31.

In accordance with another aspect of the present invention, powersupplies 13, 12 and 11 can be operated in DC (i.e., direct current)mode. Alternatively, power supplies 13, 12 and 11 can be operated in avariety of pulse modes. For example, with reference to FIG. 8, powersupplies 13, 12 and 11 can be operated using a bipolar pulse, a modifiedsine-wave, unipolar pulse, pulse reverse, pulse-on-pulse, duplex pulse,and the like. Power supplies 13, 12 and 11 can also be operated inconstant current mode, constant voltage mode, and a combination ofconstant current mode and constant voltage mode.

With reference again to FIG. 7B, a drive mechanism 30 suitably rotateswafer 31 about the z-axis. In this manner, a more uniform electropolishcan be achieved across the surface of wafer 31. In the present exemplaryembodiment, drive mechanism 30 rotates wafer 31 about the z-axis atapproximately 10 revolutions per minute to approximately 100 revolutionsper minute, and preferably at about 20 revolutions per minute.

As depicted in FIG. 7A, cathodes 1, 2 and 3 are substantially circularin shape. Accordingly, with reference to FIG. 7B, the areas of wafer 31above sections 112 and 114 are likely to be exposed to lower currentdensity than the areas of wafer 31 above sections 111, 113 and 115(i.e., those sections containing a cathode). In order to compensate,drive mechanism 30 suitably oscillates wafer 31 in the x and ydirections. Alternatively or in addition to oscillating wafer 31, asdepicted in FIGS. 9A to 9D, polishing receptacle 100, section walls 109,107, 105, 103 and 101, and cathodes 1, 2 and 3 can be formed intonon-circular shapes, such as triangles, squares, rectangles, pentagons,polygons, ellipses, and the like. In this manner, the polishing currentdistribution can be averaged out across the surface of wafer 31 as wafer31 is rotated about the z-axis.

Electrolyte 34 returns to electrolyte reservoir 36 through outlets 5, 7and 9, suitably formed in sections 112, 114 and 116, respectively. Apressure leak valve 38 is suitably placed between the outlet of pump 33and electrolyte reservoir 36 to allow electrolyte 34 to leak back toelectrolyte reservoir 36 when LMFCs 21, 22, and 23 are closed.Additionally, a heater 42, a temperature sensor 40, and a heatercontroller 44 suitably control the temperature of electrolyte 34 inelectrolyte reservoir 36. In the present exemplary embodiment, waferpolisher 50 and electrolyte 34 are preferably operated at an operatingtemperature of about 15 degrees Celsius to about 60 degrees Celsius, andpreferably at about 45 degrees Celsius.

With reference to FIG. 1A, wafer 31 is suitably electropolished for aperiod of time (i.e., an electropolishing time period), until metallayer 121 is removed from barrier layer 122, while metal layer 121remains within trenches 125 (as depicted in FIG. 1B). With reference nowto FIG. 7B, the requisite electropolishing time period can be determinedby measuring the output voltage and current of power supplies 11, 12 and13. More particularly, the resistance of barrier layer 122 is typicallysignificantly greater than metal layer 121. For example, when barrierlayer 122 includes titanium, titanium-nitride, tantalum,tantalum-nitride, tungsten, or tungsten-nitride and metal layer 121includes copper, the resistance of barrier layer 122 is typically about50 to about 100 times greater than the resistance of metal layer 121.Accordingly, the potential measured from edge to center of wafer 31after polishing metal layer 121 away from the non-trench portions ofwafer 31 is larger than that before polishing. As such, as detailed inthe table below with reference to FIGS. 7A, 7B and 10, by comparing theoutput voltages of power supplies 11, 12 and 13, the portions of metallayer 121 above wafer 31 which have been removed can be suitablydetermined:

TABLE 1 1. If V₁₁ (Voltage of power supply 11) and V₁₂ (Voltage of powersupply 12) are small in value, and V₁₃ (Voltage of power supply 13) islarge in value, then metal layer 121 on wafer 31 above cathode 1 hasbeen removed; 2. If V₁₁ is small in value, and V₁₂ and V₁₃ are large invalue, then metal layer 121 on wafer 31 above cathode 3 has not beenremoved. Additionally, metal layer 121 above cathode 2 has been removed.However, the condition of metal layer 121 on wafer 31 above cathode 1 isunknown. Therefore, the following additional conditions can be consultedto determine the condition of metal layer 121 on wafer 31 above cathode1: a. If V₁₂ and V₁₃ are close to each other in value, then metal layer121 on wafer 31 above cathode 1 has not been removed; or b. If V₁₂ andV₁₃ are apart each other in value, then metal layer 121 on wafer 31above cathode 1 has been removed; 3. If V₁₁, V₁₂ and V₁₃ are large invalue, then metal layer 121 on wafer 31 above cathode 3 has beenremoved. However, the condition of metal layer 121 on wafer 31 abovecathodes 2 and 1 is unknown. Therefore, the following additionalconditions can be consulted to determine the condition of metal layer121 on wafer 31 above cathodes 2 and 1: a. If V₁₁, V₁₂, V₁₃ are apartfrom each other in value, then metal layer 121 on wafer 31 above cathode2 and cathode 1 have been removed; b. If V₁₁ and V₁₂ are apart eachother in value, and V₁₂ and V₁₃ are close each other in value, thenmetal layer 121 on wafer 31 above cathode 2 has been removed.Additionally, metal layer 121 on wafer 31 above cathode 1 has not beenremoved; c. If V₁₁ and V₁₂ are close each other in value, and V₁₂ andV₁₃ are apart each other in value, then metal layer 121 on wafer 31above cathode has not been removed. Additionally, metal layer 121 onwafer 31 above cathode 1 has been removed; or d. If V₁₂ and V₁₃ areclose to V₁₁ in value, then metal layer 121 on wafer 31 above cathode 1and 2 are has not been removed.In the table described above, V₁₁, V₁₂ and V₁₃ were described as beinglarge and/or small. It should be recognized, however, that the termslarge and small are relative and not meant to relate to any particularvoltages. For example, when V₁₁ and V₁₂ are described above as beingsmall, V₁₁ and V₁₂ are small in comparison to V₁₃. As alluded to above,V₁₁ and V₁₂ could be as much as about 50 to about 100 times smaller thanV₁₃.

In this manner, by referring to the above table, the areas of wafer 31,which require additional electropolishing, can be suitably determined.As will be described later in conjunction with an alternative embodimentof the present invention, monitors can be suitably configured to measurethe voltage and current provided by each one of power supplies 11, 12and 13. This data can be suitably transmitted to a control system, whichcan include the above logic table in electronic format. For example, theabove table can be encoded and stored in an appropriate electronicstorage medium, such as on magnetic tape, magnetic disk, compact disk,and the like, or in an appropriate electronic device, such as on anintegrated circuit, memory chip, and the like. The control system canthen execute appropriate commands to continue or to stop theelectropolishing of a particular portion of wafer 31. It should berecognized that the control system described above can be integratedinto an appropriate computer system, which can be a component of a waferelectropolishing tool, an example of which is described below.

As described above, power supplies 13, 12 and 11 can be operated in DCmode or in a variety of pulse modes. Additionally, they can be operatedin constant current mode, constant voltage mode, or combination of thesetwo modes. In FIG. 55, a graph is shown depicting the relationshipbetween current and voltage during electropolishing using a pulsed powersupply. In FIG. 56, a graph is shown depicting the relationship betweencurrent and voltage during electropolishing using a DC power supply.

In both FIGS. 55 and 56, three regions are depicted. These regions arecharacterized by different electropolishing rates (the rate at which themetal layer is removed) and different wafer surface profiles. In theregion between points A and B (the etching region), the electropolishingrate is slower than the other two regions. In this region, a roughsurface can result on the wafer, similar to the results obtained from achemical etching process. In the region between C and D (theover-voltage polishing region), the electropolishing rate is faster thanthe other two regions. In this region, a rough surface can result on thewafer. In the region between points B and C (the polishing region), theelectropolishing rate is faster than the etching region but slower thanthe over-voltage polishing region. In this region, a fine surface canresult on the wafer.

Accordingly, the voltage and current of the power supply can be variedto control the electropolishing process. For example, when the metallayer to be removed is thick, the power supply can be maintained in theover-voltage polishing region to remove a greater amount of the metallayer. Once an initial layer is removed, the power supply can bemaintained in the polishing region to obtain a smoother surface on thewafer. The power supply can then be maintained in the etching region toslow the rate of electropolishing. As described above, the current andvoltage can be monitored to determine when to stop electropolishing(i.e., determining the end point). This end-point determination can beperformed in all three regions depicted in FIGS. 55 and 56. Butperforming end-point detection in the etching region has the advantagethat a small amount of the metal layer is removed in this region.

More particularly, when using a DC power supply in a constant voltagemode, the polishing voltage V can be controlled using the followingformula:

$V = \left\{ \begin{matrix}{V_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{V_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where, V_(polishing) is the voltage applied during normalelectropolishing, such as the voltages in the polishing regions depictedin FIGS. 55 and 56. V_(monitor) is the voltage applied during end-pointdetection, such as the voltages in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I). R₀₁ isthe predetermined resistance at which the applied voltage is reducedfrom V_(polishing) to V_(monitor). R₀₂ is the predetermined resistanceat which the applied voltage is increased from V_(monitor) toV_(polishing).

Thus, the applied voltage can be switched between V_(monitor) andV_(polishing) to produce a smooth, planar, and non-recessed (i.e.,recess 127 depicted in FIG. 1B is reduced or eliminated) surface on thewafer. By way of example, assume that a wafer is being electropolished.As such, V_(polishing) is applied to remove the metal layer from thewafer. During this time, the electropolishing resistance R is monitored.As described above, as the metal layer is removed from the wafer, theelectropolishing resistance R increases. More particularly, as the metallayer is removed, the barrier layer underneath the metal layer becomesexposed. As described above, the barrier layer typically has asignificantly greater electrical resistance than the metal layer.Consequently, as more of the barrier layer is exposed, the more theincrease in electropolishing resistance R. When the electropolishingresistance R rises above the preset resistance R₀₁, then the appliedvoltage V is reduced to V_(monitor). As described above, V_(monitor) issufficiently low that the electropolishing resistance R can be monitoredwhile removing only a small amount of the metal layer from the wafer. Bycontinuing to monitor the electropolishing resistance R, patches orsections of metal layers remaining on the wafer can be detected. Moreparticularly, the electropolishing resistance R will decrease in theseregions. If electropolishing resistance R falls below R₀₂, then theapplied voltage V is increased to V_(polishing). By adjusting R₀₁ andR₀₂, the electropolishing process can be tuned to produce a smooth,planar, and non-recessed surface on the wafer.

When using a DC power supply in a constant current mode, the polishingcurrent I can be controlled using the following formula:

$I = \left\{ \begin{matrix}{I_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{I_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where, I_(polishing) is the current applied during normalelectropolishing, such as the currents in the polishing regions depictedin FIGS. 55 and 56. I_(monitor) is the current applied during end-pointdetection, such as the currents in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I). R₀₁ isthe predetermined resistance at which the applied current is reducedfrom I_(polishing) to I_(monitor). R₀₂ is the predetermined resistanceat which the applied current is increased from I_(monitor) toI_(polishing).

Thus, the applied current can be switched between I_(monitor) andI_(polishing) to produce a smooth, planar, and non-recessed surface onthe wafer. By way of example, assume that a wafer is beingelectropolished. As such, I_(polishing) is applied to remove the metallayer from the wafer. During this time, the electropolishing resistanceR is monitored. As described above, as the metal layer is removed fromthe wafer, the electropolishing resistance R increases. Moreparticularly, as the metal layer is removed, the barrier layerunderneath the metal layer becomes exposed. As described above, thebarrier layer typically has a significantly greater electricalresistance than the metal layer. Consequently, as more of the barrierlayer is exposed, the more the increase in electropolishing resistanceR. When the electropolishing resistance R rises above the presetresistance R₀₁, then the applied current I is reduced to I_(monitor). Asdescribed above, I_(monitor) is sufficiently low that theelectropolishing resistance R can be monitored while removing only asmall amount of the metal layer from the wafer. By continuing to monitorthe electropolishing resistance R, patches or sections of metal layersremaining on the wafer can be detected. More particularly, theelectropolishing resistance R will decrease in these regions. Ifelectropolishing resistance R falls below R₀₂, then the applied currentI is increased to I_(polishing). By adjusting R₀₁ and R₀₂, theelectropolishing process can be tuned to produce a smooth, planar, andnon-recessed surface on the wafer.

When using a pulsed power supply in a constant voltage mode (meaningthat the height of each pulse is approximately the same) with a constantduty cycle, the polishing voltage V can be controlled using thefollowing formula:

$V = \left\{ \begin{matrix}{V_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{V_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where, V_(polishing) is the voltage applied during normalelectropolishing, such as the voltages in the polishing regions depictedin FIGS. 55 and 56. V_(monitor) is the voltage applied during end-pointdetection, such as the voltages in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I), wherethe applied current I is measured when the pulse is on or high. R₀₁ isthe predetermined resistance at which the applied voltage is reducedfrom V_(polishing) to V_(monitor). R₀₂ is the predetermined resistanceat which the applied voltage is increased from V_(monitor) toV_(polishing).

Thus, the applied voltage can be switched between V_(monitor) andV_(polishing) to produce a smooth, planar, and non-recessed surface onthe wafer. By way of example, assume that a wafer is beingelectropolished. As such, V_(polishing) is applied to remove the metallayer from the wafer. During this time, the electropolishing resistanceR is monitored. As described above, as the metal layer is removed fromthe wafer, the electropolishing resistance R increases. Moreparticularly, as the metal layer is removed, the barrier layerunderneath the metal layer becomes exposed. As described above, thebarrier layer typically has a significantly greater electricalresistance than the metal layer. Consequently, as more of the barrierlayer is exposed, the more the increase in electropolishing resistanceR. When the electropolishing resistance R rises above the presetresistance R₀₁, then the applied voltage V is reduced to V_(monitor). Asdescribed above, V_(monitor) is sufficiently low that theelectropolishing resistance R can be monitored while removing only asmall amount of the metal layer from the wafer. By continuing to monitorthe electropolishing resistance R, patches or sections of metal layersremaining on the wafer can be detected. More particularly, theelectropolishing resistance R will decrease in these regions. Ifelectropolishing resistance R falls below R₀₂, then the applied voltageV is increased to V_(polishing). By adjusting R₀₁ and R₀₂, theelectropolishing process can be tuned to produce a smooth, planar, andnon-recessed surface on the wafer.

When using a pulse power supply in a constant current mode with aconstant duty cycle, the polishing current I can be controlled using thefollowing formula:

$I = \left\{ \begin{matrix}{I_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{I_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where, I_(polishing) is the current applied during normalelectropolishing, such as the currents in the polishing regions depictedin FIGS. 55 and 56. I_(monitor) is the current applied during end-pointdetection, such as the currents in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I), wherethe applied voltage V is measured when the pulse is on or high. R₀₁ isthe predetermined resistance at which the applied current is reducedfrom I_(polishing) to I_(monitor). R₀₂ is the predetermined resistanceat which the applied current is increased from I_(monitor) toI_(polishing).

Thus, the applied current can be switched between I_(monitor) andI_(polishing) to produce a smooth, planar, and non-recessed surface onthe wafer. By way of example, assume that a wafer is beingelectropolished. As such, I_(polishing) is applied to remove the metallayer from the wafer. During this time, the electropolishing resistanceR is monitored. As described above, as the metal layer is removed fromthe wafer, the electropolishing resistance R increases. Moreparticularly, as the metal layer is removed, the barrier layerunderneath the metal layer becomes exposed. As described above, thebarrier layer typically has a significantly greater electricalresistance than the metal layer. Consequently, as more of the barrierlayer is exposed, the more the increase in electropolishing resistanceR. When the electropolishing resistance R rises above the presetresistance R₀₁, then the applied current I is reduced to I_(monitor). Asdescribed above, I_(monitor) is sufficiently low that theelectropolishing resistance R can be monitored while removing only asmall amount of the metal layer from the wafer. By continuing to monitorthe electropolishing resistance R, patches or sections of metal layersremaining on the wafer can be detected. More particularly, theelectropolishing resistance R will decrease in these regions. Ifelectropolishing resistance R falls below R₀₂, then the applied currentI is increased to I_(polishing). By adjusting R₀₁ and R₀₂, theelectropolishing process can be tuned to produce a smooth, planar, andnon-recessed surface on the wafer.

When using a pulsed power supply in a constant voltage mode withvariable duty cycle, the applied duty cycle D can be controlled usingthe following formula:

$D = \left\{ \begin{matrix}{D_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{D_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where D_(polishing) is the duty cycle used during the electropolishingprocess. In one embodiment, D_(polishing) is in the range between about10 percent to about 100 percent, and preferably about 80 percent.D_(monitor) is the duty cycle used during end-point detection. In oneembodiment, D_(monitor) is in the range between about 0.1 percent toabout 10 percent, and preferably about 1 percent. The frequency of thepulse can be in the range of about 1 Herz to about 100 kiloHerz, andpreferably about 100 Herz. The value of R is the electrical resistancemonitored during end-point detection. As described above, theelectropolishing resistance R can be determined by monitoring theapplied voltage V and current I. More particularly, the electropolishingresistance R can be determined by dividing the applied voltage by theapplied current (i.e., V/I), where the applied current I is measuredwhen the pulse is on or high. R₀₁ is the predetermined resistance atwhich the applied duty cycle D is reduced from D_(polishing) toD_(monitor). R₀₂ is the predetermined resistance at which the appliedduty cycle D is increased from D_(monitor) to D_(polishing).

Thus, the applied duty cycle D can be switched between D_(monitor) andD_(polishing) to produce a smooth, planar, and non-recessed surface onthe wafer. By way of example, assume that a wafer is beingelectropolished. As such, D_(polishing) is applied to remove the metallayer from the wafer. During this time, the electropolishing resistanceR is monitored. As described above, as the metal layer is removed fromthe wafer, the electropolishing resistance R increases. Moreparticularly, as the metal layer is removed, the barrier layerunderneath the metal layer becomes exposed. As described above, thebarrier layer typically has a significantly greater electricalresistance than the metal layer. Consequently, as more of the barrierlayer is exposed, the more the increase in electropolishing resistanceR. When the electropolishing resistance R rises above the presetresistance R₀₁, then the applied duty cycle D is reduced to D_(monitor).As described above, D_(monitor) is sufficiently low that theelectropolishing resistance R can be monitored while removing only asmall amount of the metal layer from the wafer. By continuing to monitorthe electropolishing resistance R, patches or sections of metal layersremaining on the wafer can be detected. More particularly, theelectropolishing resistance R will decrease in these regions. Ifelectropolishing resistance R falls below R₀₂, then the applied dutycycle D is increased to D_(polishing). By adjusting R₀₁ and R₀₂, theelectropolishing process can be tuned to produce a smooth, planar, andnon-recessed surface on the wafer.

When using a pulsed power supply in a constant current mode withvariable duty cycle, the applied duty cycle D can be controlled usingthe following formula:

$D = \left\{ \begin{matrix}{D_{polishing},{{{when}\mspace{14mu} R} < R_{02}}} \\{D_{monitor},{{{when}\mspace{14mu} R} > R_{01}}}\end{matrix} \right.$Where D_(polishing) is the duty cycle used during the electropolishingprocess. In one embodiment, D_(polishing) is in the range between about10 percent to about 100 percent, and preferably about 80 percent.D_(monitor) is the duty cycle used during end-point detection. In oneembodiment, D_(monitor) is in the range between about 0.1 percent toabout 10 percent, and preferably about 1 percent. The frequency of thepulse can be in the range of about 1 Herz to about 100 kiloHerz, andpreferably about 100 Herz. The value of R is the electrical resistancemonitored during end-point detection. As described above, theelectropolishing resistance R can be determined by monitoring theapplied voltage V and current I. More particularly, the electropolishingresistance R can be determined by dividing the applied voltage by theapplied current (i.e., V/I), where the applied voltage V is measuredwhen the pulse is on or high. R₀₁ is the predetermined resistance atwhich the applied duty cycle D is reduced from D_(polishing) toD_(monitor). R₀₂ is the predetermined resistance at which the appliedduty cycle D is increased from D_(monitor) to D_(polishing).

Thus, the applied duty cycle D can be switched between D_(monitor) andD_(polishing) to produce a smooth, planar, and non-recessed surface onthe wafer. By way of example, assume that a wafer is beingelectropolished. As such, D_(polishing) is applied to remove the metallayer from the wafer. During this time, the electropolishing resistanceR is monitored. As described above, as the metal layer is removed fromthe wafer, the electropolishing resistance R increases. When theelectropolishing resistance R rises above the preset resistance R₀₁,then the applied duty cycle D is reduced to D_(monitor). As describedabove, D_(monitor) is sufficiently low that the electropolishingresistance R can be monitored while removing only a small amount of themetal layer from the wafer. By continuing to monitor theelectropolishing resistance R, patches or sections of metal layersremaining on the wafer can be detected. More particularly, theelectropolishing resistance R will decrease in these regions. Ifelectropolishing resistance R falls below R₀₂, then the applied dutycycle D is increased to D_(polishing). By adjusting R₀₁ and R₀₂, theelectropolishing process can be tuned to produce a smooth, planar, andnon-recessed surface on the wafer.

In the description above, the electropolishing voltage, current, or dutycycle have been described as being varied between two discrete levels(i.e., a polishing and a monitoring level). It should be recognized,however, that the electropolishing voltage, current, or duty cycle canbe varied adaptively within a continuum.

More particularly, when using a DC power supply in a constant voltagemode, the polishing voltage V can be controlled using the followingformula:

$V = {V_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {V_{polishing} - V_{monitor}} \right)}}$Where, V_(polishing) is the voltage applied during normalelectropolishing, such as the voltages in the polishing regions depictedin FIGS. 55 and 56. V_(monitor) is the voltage applied during end-pointdetection, such as the voltages in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I). R_(max)is the predetermined resistance at which the metal layer has beenremoved from the wafer surface, such as depicted in FIG. 1B. R_(min) isthe predetermined resistance at which the metal layer cover the wafersurface, such as depicted in FIG. 1A. N is a scaling factor that can bedetermined experimentally to tune the electropolishing process. As such,it can be any number, such as integer, rational and irrational fraction,and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied voltage V approaches V_(monitor). As the electropolishingresistance R approaches R_(min), the applied voltage V approachesV_(polishing). In this manner, the applied voltage V is adaptivelycontrolled based on the electropolishing resistance R.

When using a DC power supply in a constant current mode, the polishingcurrent I can be controlled using the following formula:

$I = {I_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {I_{polishing} - I_{monitor}} \right)}}$Where, I_(polishing) is the current applied during normalelectropolishing, such as the currents in the polishing regions depictedin FIGS. 55 and 56. I_(monitor) is the current applied during end-pointdetection, such as the currents in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I). R_(max)is the predetermined resistance at which the metal layer has beenremoved from the wafer surface, such as depicted in FIG. 1B. R_(min) isthe predetermined resistance at which the metal layer cover the wafersurface, such as depicted in FIG. 1A. N is a scaling factor that can bedetermined experimentally to tune the electropolishing process. As such,it can be any number, such as integer, rational and irrational fraction,and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied current I approaches I_(monitor). As the electropolishingresistance R approaches R_(min), the applied current I approachesI_(polishing). In this manner, the applied current I is adaptivelycontrolled based on the electropolishing resistance R.

When using a pulsed power supply in a constant voltage mode with aconstant duty cycle, the polishing voltage V can be controlled using thefollowing formula:

$V = {V_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {V_{polishing} - V_{monitor}} \right)}}$Where, V_(polishing) is the voltage applied during normalelectropolishing, such as the voltages in the polishing regions depictedin FIGS. 55 and 56. V_(monitor) is the voltage applied during end-pointdetection, such as the voltages in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I), wherethe applied current I is measured when the pulse is on or high. R_(max)is the predetermined resistance at which the metal layer has beenremoved from the wafer surface, such as depicted in FIG. 1B. R_(min) isthe predetermined resistance at which the metal layer cover the wafersurface, such as depicted in FIG. 1A. N is a scaling factor that can bedetermined experimentally to tune the electropolishing process. As such,it can be any number, such as integer, rational and irrational fraction,and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied voltage V approaches V_(monitor). As the electropolishingresistance R approaches R_(min), the applied voltage V approachesV_(polishing). In this manner, the applied voltage V is adaptivelycontrolled based on the electropolishing resistance R.

When using a pulsed power supply in a constant current mode with aconstant duty cycle, the polishing current I can be controlled using thefollowing formula:

$I = {I_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {I_{polishing} - I_{monitor}} \right)}}$Where, I_(polishing) is the current applied during normalelectropolishing, such as the currents in the polishing regions depictedin FIGS. 55 and 56. I_(monitor) is the current applied during end-pointdetection, such as the currents in the etching regions depicted in FIGS.55 and 56. R is the electrical resistance monitored during end-pointdetection. As described above, the electropolishing resistance R can bedetermined by monitoring the applied voltage V and current I. Moreparticularly, the electropolishing resistance R can be determined bydividing the applied voltage by the applied current (i.e., V/I), wherethe applied voltage V is measured when the pulse is on or high. R_(max)is the predetermined resistance at which the metal layer has beenremoved from the wafer surface, such as depicted in FIG. 1B. R_(min) isthe predetermined resistance at which the metal layer cover the wafersurface, such as depicted in FIG. 1A. N is a scaling factor that can bedetermined experimentally to tune the electropolishing process. As such,it can be any number, such as integer, rational and irrational fraction,and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied current I approaches I_(monitor). As the electropolishingresistance R approaches R_(min), the applied current I approachesI_(polishing). In this manner, the applied current I is adaptivelycontrolled based on the electropolishing resistance R.

When using a pulsed power supply in a constant voltage mode withvariable duty cycle, the applied duty cycle D can be controlled usingthe following formula:

$D = {D_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {D_{polishing} - D_{monitor}} \right)}}$Where D_(polishing) is the duty cycle used during the electropolishingprocess. In one embodiment, D_(polishing) is in the range between about10 percent to about 100 percent, and preferably about 80 percent.D_(monitor) is the duty cycle used during end-point detection. In oneembodiment, D_(monitor) is in the range between about 0.1 percent toabout 10 percent, and preferably about 1 percent. The frequency of thepulse can be in the range of about 1 Herz to about 100 kiloHerz, andpreferably about 100 Herz. R is the electrical resistance monitoredduring end-point detection. As described above, the electropolishingresistance R can be determined by monitoring the applied voltage V andcurrent I. More particularly, the electropolishing resistance R can bedetermined by dividing the applied voltage by the applied current (i.e.,V/I), where the applied current I is measured when the pulse is on orhigh. R_(max) is the predetermined resistance at which the metal layerhas been removed from the wafer surface, such as depicted in FIG. 1B.R_(min) is the predetermined resistance at which the metal layer coverthe wafer surface, such as depicted in FIG. 1A. N is a scaling factorthat can be determined experimentally to tune the electropolishingprocess. As such, it can be any number, such as integer, rational andirrational fraction, and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied duty cycle D approaches D_(monitor). As the electropolishingresistance R approaches R_(min), the applied duty cycle D approachesD_(polishing). In this manner, the applied duty cycle D is adaptivelycontrolled based on the electropolishing resistance R.

When using a pulsed power supply in a constant current mode withvariable duty cycle, the applied duty cycle D can be controlled usingthe following formula:

$D = {D_{polishing} - {\left\{ \frac{R - R_{\min}}{R_{\max} - R_{\min}} \right\}^{N}\left( {D_{polishing} - D_{monitor}} \right)}}$Where D_(polishing) is the duty cycle used during the electropolishingprocess. In one embodiment, D_(polishing) is in the range between about10 percent to about 100 percent, and preferably about 80 percent.D_(monitor) is the duty cycle used during end-point detection. In oneembodiment, D_(monitor) is in the range between about 0.1 percent toabout 10 percent, and preferably about 1 percent. The frequency of thepulse can be in the range of about 1 Herz to about 100 kiloHerz, andpreferably about 100 Herz. R is the electrical resistance monitoredduring end-point detection. As described above, the electropolishingresistance R can be determined by monitoring the applied voltage V andcurrent I. More particularly, the electropolishing resistance R can bedetermined by dividing the applied voltage by the applied current (i.e.,V/I), where the applied voltage V is measured when the pulse is on orhigh. R_(max) is the predetermined resistance at which the metal layerhas been removed from the wafer surface, such as depicted in FIG. 1B.R_(min) is the predetermined resistance at which the metal layer coverthe wafer surface, such as depicted in FIG. 1A. N is a scaling factorthat can be determined experimentally to tune the electropolishingprocess. As such, it can be any number, such as integer, rational andirrational fraction, and the like.

Thus, as the electropolishing resistance R approaches R_(max), theapplied duty cycle D approaches D_(monitor). As the electropolishingresistance R approaches R_(min), the applied duty cycle D approachesD_(polishing). In this manner, the applied duty cycle D is adaptivelycontrolled based on the electropolishing resistance R.

In one exemplary embodiment, where the electrolyte used for theelectropolishing process is 85% (wt.) H2PO4, V_(polishing) can be in therange of about 0.5 volts to about 3 volts. V_(monitor) can be in therange of about 0.1 volts to about 0.5 volts. I_(polishing) can be in therange of about 5 mA/cm² to about 50 mA/cm². I_(monitor) can be in therange of about 0.01 mA/cm² to about 5 mA/cm². For pulsed power supplies,the peak-to-peak voltage can be about 1 volt and the peak-to-peakcurrent density can be about 30 mA/cm². It should be recognized,however, that these values are only exemplary and that they can varydepending on the particular application.

As described above, the appropriate electropolishing time period can bedetermined by measuring changes in the electropolishing resistance R.More particularly, during electropolishing where electrical power isapplied through an electrode in contact with the edges of the wafer, theelectropolishing resistance R can be expressed as follows:

$\begin{matrix}{{R = {R_{interface} + \frac{R_{ML} \times R_{barrier}}{R_{ML} + R_{barrier}} + R_{contact} + R_{cathode}}}{R = {U/I}}} & (1)\end{matrix}$Where, R, U, and I are the electropolishing resistance, voltage, andcurrent, respectively. R_(interface) is the resistance between theinterface of the wafer and the electrolyte. R_(ML) is the resistance ofthe metal film from the edge of the wafer in contact with the electrode(i.e., the electrode that provides the electrical charge to the wafer)to the area of the wafer in contact with the electrolyte. R_(barrier) isthe resistance of the barrier layer from the edge of the wafer incontact with the electrode to the area of the wafer in contact with theelectrolyte. R_(contact) is the resistance where the wafer contacts theelectrode. R_(cathode) is the resistance between the cathode and theelectrolyte.

With reference to FIG. 57, a graph is shown depicting changes inelectropolishing resistance, R over time. The electropolishing processbegins at about point A when the metal layer begins to be removed fromthe wafer surface, such as depicted in FIG. 1A. At about point C, themetal layer as be removed from the wafer surface, such as depicted inFIG. 1B. Thus, the electropolishing process is performed betweenendpoints A and B. The amount and profile of the metal layer remainingon the wafer surface being determined by where along the curve betweenthese two endpoints the electropolishing process is stopped. It shouldbe recognized, however, that the shape of the graph depicted in FIG. 57can vary depending on the particular application.

With reference to equation (1) above, during the electropolishingprocess, changes in R_(ML), R_(barrier), R_(contact), and R_(cathode)can be assumed to be relatively constant compared to the changes inR_(interface). Thus, when the derivative of equation (1) is taken withrespect to time, the following results:d(U/I)/dt=dR/dt=dR _(interface) /dt  (2)Thus equation (2) would represent tangent lines along the curve depictedFIG. 8 But as can be seen in FIG. 57, an inflection point exists atpoint B. Thus, based solely on equation (2), a point lying betweenpoints A and B can not be distinguished from a point lying betweenpoints B and C. But a second derivative of equation (1) can be taken todistinguish between points lying between points A and B from pointslying between points B and C. In this manner, the amount and profile ofthe metal layer remaining on the wafer surface can be determined bystopping the electropolishing process at the desired endpoint along thecurve depicted in FIG. 57.

For example, the electropolishing process can be stopped between pointsA and B by using the following formula to determine the endpoint:

$\begin{matrix}\left\{ \begin{matrix}{{{{\mathbb{d}R}/{\mathbb{d}t}} = C_{0}},} \\{{{\mathbb{d}^{2}R}/{\mathbb{d}t^{2}}} > 0}\end{matrix} \right. & (3)\end{matrix}$Where, C₀ is a predetermined constant at which the electropolishingprocess is to be stopped.

The electropolishing process can be stopped at point B by using thefollowing formula to determine the endpoint:

$\begin{matrix}\left\{ \begin{matrix}{{{{\mathbb{d}R}/{\mathbb{d}t}} = C_{maximum}},} \\{{{\mathbb{d}^{2}R}/{\mathbb{d}t^{2}}} = 0}\end{matrix} \right. & (4)\end{matrix}$Where, C_(maximum) is a predetermined constant at which theelectropolishing process is to be stopped.

The electropolishing process can be stopped between points B and C byusing the following formula to determine the endpoint:

$\begin{matrix}\left\{ \begin{matrix}{{{{\mathbb{d}R}/{\mathbb{d}t}} = C_{1}},} \\{{{\mathbb{d}^{2}R}/{\mathbb{d}t^{2}}} < 0}\end{matrix} \right. & (5)\end{matrix}$Where, C₁ is a predetermined constant at which the electropolishingprocess is to be stopped.

The electropolishing process can be stopped entirely (for example, byturning off the power supply). Alternatively, as described above, theelectropolishing rate can be reduced to continue to monitor theelectropolishing resistance R. If the electropolishing resistance Rsufficiently decreases (for example, as in unpolished patches or areasof the wafer), then the electropolishing rate can be increased.

The values of C₀, C_(maximum), and C₁ can be determined experimentally.For example, wafers can be processed at various C₀ settings to determinethe value that produces the desired wafer surface profile. Once thisvalue is determined, they can be used to process additional wafers.

In one exemplary embodiment, C₀ can range between about 0.01 ohms/secondto about 100 ohms/second. C_(maximum) can range between about 10ohms/second to about 100 ohms/second. C₁ can range between about 0.01ohms/second to about 100 ohms/second. It should be recognized, however,that these values can vary depending on the particular application.

As described above, power supply 200 can be operated in DC mode or in avariety of pulse modes. Additionally, it can be operated in constantcurrent mode, constant voltage mode, or combination of these modes.Further, when a pulsed power supply is used, the duty cycle can beconstant or varied.

When using a DC or a pulsed power supply in a constant voltage mode, theelectropolishing endpoint can be determined using the following formula:dR/dt=U(−1/I ²)(dI/dt)d ² R/dt ² =U(2/I ³)(dI/dt)² +U(−1/I ²)(d ² I/dt ²)  (6)Where, U is the applied voltage and I is the applied current. When apulsed power supply is used, the applied current I is measured when thepulse is on or high.

When using a DC or a pulsed power supply in a constant current mode, theelectropolishing endpoint can be determined using the following formula:dR/dt=(dU/dt)/Id ² R/dt ²=(d ² U/dt ²)/I  (7)Where, U is the applied voltage and I is the applied current. When apulsed power supply is used, the applied voltage U is measured when thepulse is on or high.

Thus, when the values for dR/dt and d²R/dt² using formulas (6) or (7)meet the conditions setforth in equations (3), (4), or (5), theelectropolishing process is stopped. The electropolishing process can bestopped entirely (for example, by turning off the power supply).Alternatively, as described above, the electropolishing rate can bereduced to continue to monitor the electropolishing resistance R. If theelectropolishing resistance R sufficiently decreases (for example, as inunpolished patches or areas of the wafer), then the electropolishingrate can be increased. Additionally, when a pulsed power supply is used,the duty cycle can be altered to alter the electropolishing rate.

In the description above, the electropolishing resistance R wasdescribed as increasing when the metal layer is removed to expose thebarrier layer. As alluded to earlier, in some applications, the barrierlayer can be omitted from the wafer. When the wafer does not include abarrier layer, the dielectric layer is exposed when the metal layer isremoved. Dielectric layers typically have a greater electricalresistance characteristic than the metal layer. Accordingly, theelectropolishing resistance R will increase when the metal layer isremoved to expose the dielectric layer.

Additionally, it should be appreciated, however, that various techniquescan be used to determine the appropriate electropolishing time period.For example, as will be described in greater detail below in conjunctionwith an alternative embodiment, sensors can be used to measure thethickness of metal layer 121 (FIG. 1A) on wafer 31 (FIG. 1A and FIG.7B).

Alternatively, with reference to FIG. 53, an end-point detector systemcan be suitably employed to determine the appropriate electropolishingtime period. In accordance with an exemplary embodiment, the measuredelectrical resistance from edge to edge of wafer 31 (FIG. 1A) ismonitored using appropriate measurement tools. As depicted in FIG. 53,as the surface area of metal layer 121 (FIG. 1A) on wafer 31 (FIG. 1A)is reduced due to electropolishing, the electrical resistance measuredfrom edge to edge of wafer 31 (FIG. 1A) increases. Accordingly, theappropriate time at which to stop electropolishing is preferably aroundthe time at which the measured electrical resistance from edge to edgeof wafer 31 changes rapidly. With specific reference to FIG. 53, thiswould be at or near t0 and t1. The region beyond t1 is called theover-polishing region, meaning that wafer 31 (FIG. 1B) has been polishedsuch that the level of metal layer 121 (FIG. 1B) within trench 125 (FIG.1B) extends below the level of barrier layer 122 (FIG. 1B). The regionbefore t0 is called the under-polishing region, meaning that metal layer121 (FIG. 1A) has not been entirely removed from dielectric layer 122(FIG. 1A) on gates 126 (FIG. 1A). The resistance signal can be sent to acomputer, which can then send the appropriate signal to stop thepolishing process.

With reference to FIGS. 7A and 7B, using the exemplary embodiment of thepresent invention described above, the following process steps can beemployed to selectively electropolish portions of wafer 31:

Step 1: Turn on power supply 13;

Step 2: Turn on LMFC 23 only, such that electrolyte 34 only contacts theportion of wafer 31 above cathode 1 to electropolish metal layer 121(FIG. 1A) above cathode 1;

Step 3: Turn off power supply 13 and turn off LMFC 23, when thethickness of metal layer 121 (FIG. 1A) reaches a set value or thickness;

Step 4: Repeat steps 1 to 3 for cathode 2, using LMFC 22 and powersupply 12; and

Step 5: Repeat steps 1 to 3 for cathode 3, using LMFC 21 and powersupply 11.

In addition to the above described electropolishing sequence of cathode1, then cathode 2, and then cathode 3, the electropolishing sequence canalso be as follows:

1) cathode 3, then cathode 2, and then cathode 1;

2) cathode 2, then cathode 1, and then cathode 3;

3) cathode 2, then cathode 3, and then cathode 1;

4) cathode 3, then cathode 1, and then cathode 2; or

5) cathode 1, then cathode 3, and then cathode 2.

By selectively polishing portions of wafer 31, metal layer 121 (FIG. 1A)can be electropolished more uniformly from wafer 31, even when wafer 31is a large diameter wafer. For example, the present invention can beused with a wafer 31 having a diameter of 300 millimeters or greater. Inthe present context, a uniform electropolish refers to electropolishingwafer 31 such that metal layer 121 is removed to an approximately eventhickness across substantially all of the surface area of wafer 31. Ingeneral, in conventional electropolishing systems, the greater thediameter of wafer 31, the greater the nonuniformity of theelectropolish. For example, the areas of wafer 31 near the center can beoverpolished while the areas of wafer 31 near the edges of wafer 31 canbe underpolished. This can be due in part to the varying chargedensities applied across wafer 31 by conventional electropolishingsystems.

In addition to selectively polishing portions of wafer 31, using theexemplary embodiment of the present invention described above, thefollowing process steps can be employed to electropolish the entiresurface of wafer 31 substantially at one time:

Step 1: Turn on all power supplies 11, 12 and 13. As described above,the current of each power supply 11, 12 and 13 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode;

Step 2: Turn on LMFCs 21, 22 and 23. As also described above, the flowrate of electrolyte 34 from each LMFC 21, 22 and 23 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode; and

Step 3: Turn off power supplies 11, 12 and 13 at the same time when thethickness uniformity of metal layer 121 (FIG. 1A) reaches a set value orthickness. Also, power supplies 11, 12 and 13 can be turned off atdifferent times to adjust the thickness uniformity of metal layer 121(FIG. 1A).

In this manner, the rate of removal of metal layer 121 from differentportions of wafer 31 can be suitably controlled to more uniformlyelectropolish metal layer 121 on wafer 31.

Having thus described the structure and operation of an exemplaryembodiment, an application of the present invention in the context of adamascene process will be described below. It should be recognized,however, that such description is not intended as a limitation on theuse or applicability of the present invention, but is instead providedto enable a full and complete description of the present exemplaryembodiment.

With reference again to FIG. 1A, in general, when metal layer 121 issuitably formed on wafer 31, recesses 127 can form over trenches 125. Asdepicted in FIG. 1A, even after electropolishing, recesses 127 canremain in the metal layer 121 formed within trenches 125. This can bedue in part to the original uneven topology of metal layer 121 depictedin FIG. 1A. Additionally, overpolishing can contribute to the formationof recesses 127 within trenches 125. The existence of recesses 127 canadversely affect the performance of the semiconductor device.Accordingly, recesses 127 having a recess depth 128 greater than about500 Angstroms are typically considered undesirable. It should berecognized, however, that the amount of recess depth 128, which isacceptable, can vary depending on the particular application. Forexample, for a high precision semiconductor device, a recess depth 128of no more than a few Angstroms can be acceptable. However, for a lowcost semiconductor device, a recess depth 128 greater than 500 Angstromscan be acceptable.

In accordance with one aspect of the present invention, theelectropolishing time period can be suitably controlled to prevent theformation of recesses 127 with recess depth 128 of greater than about500 Angstroms. However, this can increase processing cost and reduceprocessing throughput. Accordingly, in accordance with another aspect ofthe present invention, an electropolishing and electroplating processcan be suitably combined with a chemical mechanical polishing (CMP)process to remove recesses 127. In general, CMP processes can suitablyproduce a planar surface on wafer 31 with recesses 127 having a recessdepth 128 between about 100 and about 500 Angstroms.

With reference to FIG. 1B, as described above, metal layer 121 issuitably electropolished from barrier layer 122 formed on mesas 126.With reference to FIG. 1C, wafer 31 then undergoes a replating processto replate a sufficient amount of metal to fix recesses 127 (FIG. 1B),meaning that metal is plated onto metal layer 121, which is formed intrenches 125 (FIG. 1B), without replating over barrier layer 122 onmesas 126. With reference to FIG. 7B, as alluded to earlier, wafer 31can be suitably replated by reversing the polarity of power supplies 11,12 and 13. In this manner, as also described in greater detail below,wafer 31 can be suitably replated without necessarily having to transferwafer 31 to another station.

Next, in accordance with another aspect of the present invention, themetal layer 123 within trenches 125, which has been replated, issuitably planarized, and the barrier layer 122 is suitably removed. Inthe present exemplary embodiment, wafer 31 is preferably planarizedusing a CMP process. By having removed the majority of metal layer 123using the above described electropolishing process, only a small amountof metal layer 123 now needs to be removed using CMP, which reducesoverall processing time and cost.

With reference now to FIGS. 3A to 3C, a wafer-processing tool 301,according to various aspects of the present invention, is shown. In anexemplary embodiment of the present invention, wafer processing tool 301preferably includes electroplating/electropolishing cells 300, 302, 304,306 and 308, cleaning cells 310, 312, 314, 316 and 318, a CMP cell 324,wafer cassette 320, and a robot 322.

Robot 322 begins by transferring a wafer from wafer cassette 320 to anyone of electroplating/electropolishing cells 300, 302, 304, 306, or 308.The wafer is suitably electroplated with a metal layer 121 (FIG. 1A).Next, the wafer is suitably electropolished to remove metal layer 121from barrier layer 122 (FIG. 1B). Next, the wafer is suitably replatedto fix recesses 127 (FIGS. 1B and 1C). Robot 322 then transfers thewafer to any one of cleaning cells 310, 312, 314, 316, or 318. After thewafer is cleaned, robot 322 transfers the wafer to CMP cell 324, wherethe metal layer 121 is planarized and barrier layer 122 is removed (FIG.1D). Robot 322 then transfers the wafer to any one of cleaning cells300, 302, 304, 306, or 308 for the wafer to be cleaned and dried.Finally, robot 322 transfers the wafer to wafer cassette 320 and beginsagain with another wafer.

It should be recognized, however, that various modifications can be madeto the configuration of wafer processing tool 301 without deviating fromthe spirit and/or scope of the present invention. For example, theinitial electroplating and electropolishing of the wafer can beperformed in separate cells. In general, different electrolytes are usedfor electroplating and electropolishing. For electroplating, a sulfuricacid is typically used. For electropolishing, a phosphoric acid istypically used. Although sulfuric acid can be used for electropolishing,the resulting surface can be non-uniform. Similarly, although phosphoricacid can be used for electroplating, the resulting surface can benon-uniform. A non-uniform surface can be acceptable for the replatingprocess described above. However, a non-uniform surface can beunacceptable for the initial plating of metal layer 121. Accordingly,when a uniform surface is preferred, the electroplating andelectropolishing of the wafer can be performed in separate cells withdifferent chemistries. Alternatively, when electroplating andelectropolishing is performed in the same cell, the chemistry of theelectrolyte solution within the cell can be varied. For example, for thereplating process described above, a sulfuric acid solution can be addedto facilitate a better electroplating process.

With reference to FIG. 2, the processing steps performed by waferprocessing tool 301 are set forth in a flow chart format. It should berecognized, however, that various modifications can be made to the stepsdepicted in the flow chart in FIG. 2. For example, the wafers may bequeued after the re-plating step, then rinsed and cleaned in a batchprocess.

With reference to FIGS. 4A to 4D, one alternative to polishing wafer 31using CMP after replating wafer 31 is to etch metal layer 121 andbarrier layer 122 from wafer 31 using any convenient etching process.Accordingly, with reference to FIGS. 6A to 6C, wafer-processing tool 301can be modified to include an etching cell 326. Similarly, withreference to FIG. 5, the processing steps performed by wafer processingtool 301 can be modified to include an etching step.

In the following description and associated drawing figures, variousalternative embodiments in accordance with various aspects of thepresent invention will be described and depicted. It should berecognized, however, that these alternative embodiments are not intendedto demonstrate all of the various modifications, which can be made tothe present invention. Rather, these alternative embodiments areprovided to demonstrate only some of the many modifications which arepossible without deviating from the spirit and/or scope of the presentinvention.

With reference now to FIGS. 11A and 11B, an alternative embodiment ofthe present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIGS. 11A and 11B is similar tothat of FIGS. 7A and 7B except that LMFCs 21, 22 and 23 (FIGS. 7A and7B) have been replaced by LMFC 55 and valves 51, 52 and 53. In thepresent alternative embodiment, valves 51, 52 and 53 are preferablyon/off valves. The flow rate set of LMFC 55 can be preferably determinedbased on the status of each valve as follows:

$\begin{matrix}{{{Flow}\mspace{14mu}{rate}\mspace{14mu}{set}\mspace{14mu}{of}\mspace{14mu}{LMFC}\mspace{14mu} 55} = {{{F.R.\; 3} \times {f\left( {{valve}\mspace{14mu} 51} \right)}} +}} \\{{{F.R.\; 2} \times {f\left( {{valve}\mspace{14mu} 52} \right)}} + -} \\{{F.R.\; 1} \times {f\left( {{valve}\mspace{14mu} 53} \right)}}\end{matrix}$Where, F.R. 3 is the set point of flow rate to inlet 4, F.R. 2 is theset point of flow rate to inlet 6, F.R. 3 is the set point of flow rateto inlet 8, and f (valve #) is a valve status function defined asfollows:

$\begin{matrix}{{{f\left( {{valve}\mspace{14mu}\#} \right)} = 1},{{{when}\mspace{14mu}{valve}\mspace{14mu}\#\mspace{14mu}{is}\mspace{14mu}{turned}\mspace{14mu}{on}};}} \\{0,{{when}\mspace{14mu}{valve}\mspace{14mu}\#\mspace{14mu}{is}\mspace{14mu}{turned}\mspace{14mu}{{off}.}}}\end{matrix}$As alluded to above, the flow rates can be set proportionate to thevolumes of section 15, 113 and 111.

With reference now to FIGS. 12A and 12B, another alternative embodimentof the present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIGS. 12A and 12B is similar tothat of FIGS. 7A and 7B except that LMFCs 21, 22 and 23 (FIGS. 7A and7B) have been replaced by three pumps 33 and on/off valves 51, 52 and53. In the present alternative embodiment, the delivery of electrolyte34 into polishing receptacle 100 through inlets 4, 6 and 8 can bepreferably controlled independently by each one of three pumps 33 andone on/off valve 51, 52, or 53.

With reference now to FIGS. 13A and 13B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. In contrast to the exemplary embodimentshown in FIGS. 7A and 7B, in the present alternative embodiment, acathode is preferably disposed in every section of polishing receptacle100 except section 132. For example, additional cathode 154 is suitablydisposed between section walls 103 and 105. Additionally, on/off valves81, 82, 83 and 84 are suitably disposed between the electrolytereservoir 36 and the outlets of LMFCs 21, 22, 23 and 24. Accordingly,when an on/off valve 81, 82, 83 or 84 is in an open position,electrolyte 34 can suitably flow back into electrolyte reservoir 36through the open valve from polishing receptacle 100.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 14;

Step 2: Turn on LMFC 24 and open valves 81,82, and 83. Turn off LMFCs21, 22, and 23 and close valve 84, such that electrolyte 34 onlycontacts the portion of wafer 31 above cathode 1. Electrolyte 34 thenreturns to electrolyte reservoir 36 through outlet 132 suitably formedin section 130. Electrolyte 34 also returns to electrolyte reservoir 34through open valves 81, 82 and 83;

Step 3: When the thickness of metal layer 121 (FIG. 1A) reaches a setvalue or thickness, turn off power supply 14 and turn off LMFC 24;

Step 4: Repeat steps 1 to 3 for cathode 2 (Turn on LMFC 23. Open valves81, 82 and 84. Turn on power supply 13. Turn off LMFCs 21, 22 and 24.Close valve 83. Turn off power supplies 11, 12 and 14);

Step 5: Repeat steps 1 to 3 for cathode 3 (Turn on LMFC 22. Open valves81, 83 and 84. Turn on power supply 12. Turn off LMFCs 21, 23 and 24.Close valve 82. Turn off power supplies 11, 13 and 14); and

Step 6: Repeat steps 1 to 3 for cathode 4 (Turn on LMFC 21. Open valves82, 83 and 84. Turn on power supply 11. Turn off LMFCs 22, 23 and 24.Close valve 81. Turn off power supplies 12, 13, and 14).

It should be recognized that rather than polishing from periphery of thewafer to center of the wafer, polishing also can be performed fromcenter to periphery, or can be performed by randomly choosing a cathodesequence.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supplies 11, 12, 13 and 14. As described earlier,the current of each power supply 11, 12, 13 and 14 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode.

Step 2: Turn on LMFCs 21, 22, 23 and 24 and turn off valves 81, 82, 83,84. As also described earlier, the flow rate of electrolyte 34 fromLMFCs 21, 22, 23 and 24 can be suitably set proportionate to the surfacearea of wafer 31 covered by the corresponding cathode; and

Step 3: Turn off power supplies 11, 12, 13 and 14 at the same time whenmetal layer 121 (FIG. 1A) reaches a set value or thickness. Also, powersupplies 11, 12, 13 and 14 can be turned off at different times toadjust the thickness uniformity of metal layer 121 (FIG. 1A).

With reference now to FIGS. 14A and 14B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 14A and 14B issimilar to that of FIGS. 13A and 13B except that on/off valves 81, 82,83 and 84 (FIGS. 13A and 13B) have been removed. Accordingly,electrolyte 34 returns to electrolyte reservoir 36 only through section130.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 14 to output negative potential toelectrode 1 (cathode 1). Turn on power supplies 11, 12 and 13 to outputpositive potential to electrode 4, 3 and 2 (anodes 4, 3 and 2),respectively;

Step 2: Turn on LMFC 24 only and turn off LMFCs 21 22, and 23. Wafer 31is steeped in electrolyte 34, however, only the portion of wafer 31above cathode 1 contacts electrolyte 34 from LMFC 24 and negativepotential from cathode 1. Therefore, only the portion of metal layer 121(FIG. 1A) on wafer 31 above cathode 1 is suitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set-value or thickness,turn off power supply 14 and turn off LMFC 24;

Step 4: Repeat steps 1 to 3 for cathode 2 (Turn on power supply 13 tooutput negative potential to cathode 2, and power supplies 11, 12, and14 to output positive potential to anodes 4, 3, and 1, respectively.Turn on LMFC 23 and turn off LMFCs 21, 22 and 24);

Step 5: Repeat steps 1 to 3 for cathode 3 (Turn on power supply 12 tooutput negative potential to cathode 3. Turn on power supplies 11, 13and 14 to output positive potential to anodes 4, 2 and 1, respectively.Turn on LMFC 22 and turn off LMFCs 21, 23 and 24); and

Step 6: Repeat steps 1 to 3 for cathode 4 (Turn on power supply 11 tooutput negative potential to cathode 4. Turn on power supplies 12, 13and 14 to output positive potential to anodes 1, 2 and 3, respectively.Turn on LMFC 21 and turn off LMFCs 22, 23 and 24).

In the above selective polishing process, instead of polishing from thecenter of wafer 31 to the periphery of wafer 31, the polishing also canbe performed from the periphery to the center, or can be performedrandomly depending on the cathode sequence.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supplies 11, 12, 13 and 14. As described earlier,the current of each power supply 11, 12, 13 and 14 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode;

Step 2: Turn on LMFCs 21, 22, 23 and 24. As also described earlier, theflow rate of electrolyte 34 from LMFCs 21, 22, 23 and 24 can be suitablyset proportionate to the surface area of wafer 31 covered by thecorresponding cathode; and

Step 3: Turn off power supplies 11, 12,13 and 14 at the same time whenmetal layer 121 (FIG. 1A) reaches a set value or thickness. Also, powersupplies 11, 12, 13 and 14 can be turned off at different times toadjust the thickness uniformity of metal layer 121 (FIG. 1A).

With reference now to FIG. 15, another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. The embodiment of FIG. 15 is similar to that ofFIGS. 7A and 7B except that a diffuser ring 112 has been added aboveeach cathode. In accordance with one aspect of the present invention,diffuser ring 112 preferably facilitates a more uniform flow ofelectrolyte 34 along section walls 109, 107, 105 and 103. As such, metallayer 121 (FIG. 1A) can be suitably electropolished more uniformly fromwafer 31.

Additionally, diffuser ring 112 can be suitably formed using anyconvenient method. For example, diffuser ring 112 can be machined tohave a number of holes. Alternatively, diffuser ring 112 can include anysuitable porous material having porosity preferably in the range ofabout 10% to about 90%. Additionally, in the present alternativeembodiment, diffuser ring 112 is preferably formed from anti-acid,anti-corrosion, particle and contamination free materials.

With reference now to FIGS. 16A and 16B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 16A and 16B issimilar to that of FIGS. 7A and 7B except that charge accumulator meters141, 142 and 143 have been added to power supplies 11, 12 and 13,respectively. In accordance with one aspect of the present invention,charge accumulator meters 141, 142 and 143 preferably measure the chargeeach power supply 11, 12 and 13 provides during the electropolishingprocess. The total number of atoms of copper removed can be calculatedby dividing the accumulated charge by two. The total number of atoms ofcopper removed can then be used to determine how much copper remains tobe electropolished.

With reference now to FIGS. 17A and 17B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 17A and 17B issimilar to that of FIGS. 7A and 7B except that polishing receptacle 100suitably includes a plurality of inlets 171, 172, 174 and 175 suitablydisposed in sections 113 and 115 for delivery of electrolyte 34. Moreparticularly, in the present alternative embodiment, electrolyte 34 ispreferably delivered into section 113 through feed line 170 and inlets171 and 172. Electrolyte 34 is preferably delivered into section 115through electrolyte feed line 173 and inlets 174 and 175. By deliveringelectrolyte 34 into plating receptacle 10 using a plurality of inlets171, 172, 174 and 175, a more uniform flow profile can be preferablyobtained. Furthermore, it should be recognized that sections 113 and 115can include any number of additional inlets.

With reference now to FIGS. 18A and 18B, two additional alternativeembodiments of the present invention, according to various aspects ofthe present invention, are shown. The embodiment of FIG. 18A is similarto that of FIGS. 13A and 13B and FIGS. 14A and 14B except that theheight of section walls 109, 107, 105 and 103 increases outward alongthe radial direction. In contrast, in the embodiment of FIG. 18B, theheight of section walls 109, 107, 105 and 103 decreases outward alongthe radial direction. In this manner, the flow pattern of electrolyte 34can be further controlled to enhance the electropolishing process.

With reference now to FIGS. 19A and 19B, two additional alternativeembodiments of the present invention, according to various aspects ofthe present invention, are shown. The embodiment of FIG. 19A is similarto that of FIGS. 7A and 7B except that the height of section walls 109,107, 105, 103 and 101 increases outward along the radial direction. Incontrast, in the embodiment of FIG. 19B, the height of section walls109, 107, 105, 103 and 101 decreases outward along the radial direction.In this manner, the flow pattern of electrolyte 34 can be furthercontrolled to enhance the electropolishing process.

With reference now to FIGS. 20A and 20B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 20A and 20B issimilar to that of FIGS. 7A and 7B, except that section walls 109, 107105, 103 and 101 are configured to move up and down to adjust the flowpattern of electrolyte 34. As shown in FIG. 20B, section walls 105 and107 can move up, such that electrolyte 34 flows toward the portion ofwafer 31 above section walls 105 and 107.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 13;

Step 2: Turn on LMFC 23 only and move section wall 109 close to wafer31, such that electrolyte 34 only contacts the portion of wafer 31 abovesection wall 109. In this manner, metal layer 121 (FIG. 1A) on theportion of wafer 31 above section wall 109 is suitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 13, turn off LMFC 23, and move section wall 109 toa lower position;

Step 4: Repeat steps 1 to 3 for section walls 105 and 107 using LMFC 22,section walls 105 and 107, and power supply 12; and

Step 5: Repeat steps 1 to 3 for section walls 101 and 103 using LMFC 21,section walls 101 and 103, and power supply 11.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supplies 11, 12 and 13. As described earlier, thecurrent of each power supply 11, 12 and 13 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode.

Step 2: Turn on LMFCs 21, 22 and 23, and move all section walls 101,103, 105, 107 and 109 adjacent to wafer 31. As also described earlier,the flow rate of electrolyte 34 from LMFCs 21, 22 and 23 can be suitablyset proportionate to the surface area of wafer 31 covered by thecorresponding cathode; and

Step 3: Turn off power supplies 11, 12, and 13 at the same time whenmetal layer 121 (FIG. 1A) reaches a set value or thickness. Also, powersupplies 11, 12 and 13 can be turned off at different times to adjustthe thickness uniformity of metal layer 121 (FIG. 1A).

With reference now to FIGS. 21A and 21B, two additional alternativeembodiments of the present invention, according to various aspects ofthe present invention, are shown. The embodiment of FIG. 21A is similarto that of FIGS. 7A and 7B, except that, in the present alternativeembodiment, cathodes 1, 2, 3 and 4 and section walls 109, 107, 105 and103 are divided into six sections. The embodiment of FIG. 21B is similarto FIGS. 13A and 13B, except that, in the present alternativeembodiment, cathodes 1, 2 and 3 and section walls 109, 107, 105, 103 and101 are divided into six sections. It should be recognized, however,that with regard to both embodiments in FIGS. 21A and 21B, any number ofsections can be used without deviating from the spirit and/or scope ofthe present invention.

Additionally, as described in the table below, the cathodes can beconnected to one or more power supplies and the sections can beconnected to one or more LMFCs in various combinations:

TABLE 2 Combi- Various ways to connect the Various ways to connect onenation cathodes to one or more or more sectors to one or No. powersupplies more LMFCs 1 Each cathode is connected to an Each sector isconnected to an independent power supply independent LMFC 2 Each cathodeis connected to an Sectors on the same radius are independent powersupply connected to an independent LMFC 3 Each cathode is connected toan All sectors are connected to independent power supply an independentLMFC 4 Cathodes on the same radius are Each sector is connected toconnected to an independent an independent LMFC power supply 5 Cathodeson the same radius are Sectors on the same radius are connected to anindependent connected to an independent power supply LMFC 6 Cathodes onthe same radius are All sectors are connected to connected to anindependent an independent LMFC power supply 7 All cathodes areconnected to Each sector is connected to an an independent power supplyindependent LMFC 8 All cathodes are connected to Sectors on the sameradius are an independent power supply connected to an independent LMFC9 All cathodes are connected to All sectors are connected to anindependent power supply an independent LMFC

In the above table, the operation of combination numbers 1, 2, 4 and 5are the same as described earlier in conjunction with variousalternative embodiments. The operation of combination numbers 3, 6, 7, 8and 9 will be described in greater detail below in conjunction withvarious other alternative embodiments.

With reference now to FIGS. 22A and 22B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 22A and 22B issimilar to that of FIGS. 7A and 7B, except that cathodes 1, 2 and 3(FIGS. 7A and 7B) and section walls 109, 107, 105, 103 and 101 (FIGS. 7Aand 7B) have been replaced by a plurality of rod-type cathodes 501suitably disposed within a plurality of tubes 503. In the presentalternative embodiment, electrolyte 34 (FIG. 7B) is preferably deliveredto electropolishing receptacle 100 through plurality of tubes 503,contacts the surface of wafer 31, then drains out of electropolishingreceptacle 100 through a plurality of drainage holes 500. As depicted inFIG. 22A, in the present alternative embodiment, cathodes 501, pluralityof tubes 503, and plurality of drainage holes 500 are preferablyarranged in a circular pattern. However, with reference to FIGS. 23A to23C, cathodes 501, plurality of tubes 503, and plurality of drainageholes 500 can also be configured in various other patterns, such as atriangle (FIG. 23A), a square (FIG. 23B), an ellipse (FIG. 23C), and thelike.

Additionally, as described in the table below, cathodes 501 andplurality of tubes 503 can be connected to power supplies 11, 12 and 13(FIG. 7B) and LMFCs 21, 22 and 23 (FIG. 7B), respectively, in variouscombinations:

TABLE 3 Combi- Various ways to connect Various ways to connect nationcathodes 501 to one or more plurality of tubes 503 to No. power suppliesone or more LMFCs 1 Each cathode is connected to an Each tube isconnected to independent power supply an independent LMFC 2 Each cathodeis connected to an Tubes on the same radius independent power supply areconnected to an independent LMFC 3 Each cathode is connected. to an Alltubes are connected to independent power supply an independent LMFC 4Cathodes on the same radius Each tube is connected to are connected toan independent an independent LMFC power supply 5 Cathodes on the sameradius Tubes on the same radius are connected to an independent areconnected to an power supply independent LMFC 6 Cathodes on the sameradius All tubes are connected to are connected to an independent anindependent LMFC power supply 7 All cathodes are connected to Each tubeis connected to an independent power supply an independent LMFC 8 Allcathodes are connected to Tubes on the same radius an independent powersupply are connected to an independent LMFC 9 All cathodes are connectedto All tubes are connected to an independent power supply an independentLMFC

In the above table, the operation of combination numbers 1, 2, 4 and 5are the same as described earlier in conjunction with variousalternative embodiments. The operation of combination numbers 3, 6, 7, 8and 9 will be described in greater detail below in conjunction withvarious other alternative embodiments.

With reference now to FIGS. 24A and 24B, another alternative embodimentof the present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIGS. 24A and 24B is similar tothat of FIGS. 7A and 7B, except that cathodes 1, 2 and 3 (FIGS. 7A and7B) and section walls 109, 107, 105, 103 and 101 (FIGS. 7A and 7B) havebeen replaced with cathode 240, bar 242, and valves 202, 204, 206, 208,210, 212, 214, 216 and 218. In the present alternative embodiment, thenumber of power supplies has been reduced to power supply 200.Additionally, valves 202, 204, 206, 208, 210, 212, 214, 216 and 218 arepreferably on/off valves used to control the flow of electrolyte 34 ontowafer 31. Furthermore, valves 202, 204, 206, 208, 210, 212, 214, 216 and218 are disposed symmetrically on bar 242 to facilitate a more uniformelectropolishing process.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 200;

Step 2: Turn on pump 33, LMFC 55, and drive mechanism 30. Turn on valves202 and 218, such that electrolyte 34 only contacts the portion of wafer31 above valves 202 and 218. In this manner, metal layer 121 (FIG. 1A)on the portion of wafer 31 above valves 202 and 218 is electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 200, LMFC 55, and valves 202 and 218;

Step 4: Repeat steps 1 to 3 for valves 204 and 216;

Step 5: Repeat steps 1 to 3 for valves 206 and 214;

Step 6: Repeat steps 1 to 3 for valves 208 and 212; and

Step 7: Repeat steps 1 to 3 for valves 210.

During the above described polishing process, power supply 200 can beoperated in DC mode, or in a variety of pulse modes, as shown in FIG. 8.Also, the power supply can be turned on after turning on pump 33 andvalves 202 and 216, or 204 and 214, or 206 and 212, or 210.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 200;

Step 2: Turn on LMFC 55 and all valves 202, 204, 206, 208, 210, 212,214, 216 and 218, such that electrolyte 34 contacts substantially theentire surface area of wafer 31; and

Step 3: Turn off power supply 200 and all valves when the film thicknessreaches a set value. Also, valves 202, 204, 206, 208, 210, 212, 214, 216and 218 can be turned off at different times to adjust the thicknessuniformity of metal layer 121 (FIG. 1A) on wafer 31.

With reference now to FIG. 25, still another alternative embodiment ofthe present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIG. 25 is similar to that ofFIGS. 24A and 24B, except that all valves are disposed on bar 242 atdifferent radii on bar 242 to facilitate a more uniform electropolish.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 200 (FIG. 24B);

Step 2: Turn on pump 33 (FIG. 24B), LMFC 55 (FIG. 24B), and drivemechanism 30 (FIG. 24B). Turn on valve 218, such that electrolyte 34only contacts the portion of wafer 31 above valve 218. In this manner,metal layer 121 (FIG. 1A) on the portion of wafer 31 above valve 218 iselectropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 200 (FIG. 24B), LMFC 55 (FIG. 24B), and valves218;

Step 4: Repeat steps 1 to 3 for valve 204;

Step 5: Repeat steps 1 to 3 for valve 216;

Step 6: Repeat steps 1 to 3 for valve 206; and

Step 7: Repeat steps 1 to 3 for valves 214, 208, 212, and 210,respectively.

During the above described polishing process, power supply 200 (FIG.24B) can be operated in DC mode, or in a variety of pulse modes, asshown in FIG. 8. Additionally, the electroplating sequence can bestarted from the center of wafer 31 to the edge of wafer 31 withoutdeviating from the spirit and/or scope of the present invention.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 200 (FIG. 24B);

Step 2: Turn on LMFC 55 (FIG. 24B) and all valves 204, 206, 208, 210,212, 214, 216 and 218, such that electrolyte 34 contacts substantiallythe entire surface area of wafer 31; and

Step 3: Turn off power supplies 200 (FIG. 24B) and all valves when thefilm thickness reaches a set value. Also, valves 202, 204, 206, 208,210, 212, 214, 216 and 218 can be turned off at different times toadjust the thickness uniformity of metal layer 121 (FIG. 1A) on wafer 31(FIG. 24B).

With reference now to FIG. 26, yet another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. The embodiment of FIG. 26 is similar to that ofFIG. 25 except that an additional bar has been added to form across-shaped bar 244. Valves 202 and 218, 204 and 216, 206 and 214, 208and 212 are placed symmetrically on the horizontal portion of bar 244(as depicted in FIG. 26). Similarly, valves 220 and 236, 222 and 234,224 and 232 are placed symmetrically on vertical portion of bar 244 (asdepicted in FIG. 26). Additionally, as depicted in FIG. 26, the valveson horizontal portion of bar 244 are disposed at different radii thanthe valves on the vertical portion of bar 244.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 200 (FIG. 24B);

Step 2: Turn on pump 33 (FIG. 24B), LMFC 55 (FIG. 24B), and drivemechanism 30 (FIG. 24B). Turn on valves 218 and 202, such thatelectrolyte 34 contacts the portion of wafer 31 above valves 218 and202. In this manner, metal layer 121 (FIG. 1A) on the portion of wafer31 above valves 218 and 202 is electropolished.

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 200 (FIG. 24B), LMFC 55 (FIG. 24B), valves 218 and202;

Step 4: Repeat steps 1 to 3 for valves 220 and 236;

Step 5: Repeat steps 1 to 3 for valves 204 and 216;

Step 6: Repeat steps 1 to 3 for valves 222 and 234; and

Step 7: Repeat steps 1 to 3 for valves 206 and 214, 224 and 232, 208 and212, and 210 only, respectively.

During the above described polishing process, power supply 200 (FIG.24B) can be operated in DC mode, or in a variety of pulse modes, asshown in FIG. 8.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 200 (FIG. 24B);

Step 2: Turn on pump 33 (FIG. 24B), LMFC 55 (FIG. 24B), and all valves204, 206, 208, 210, 212, 214, 216, 218, 220, 222, 224, 232, 234 and 236,such that electrolyte 34 only contacts substantially the entire surfacearea of wafer 31; and

Step 3: Turn off power supply 200 (FIG. 24B) and all valves when thethickness of metal layer 121 (FIG. 1A) reaches a set value. All valves204, 206, 208, 210, 212, 214, 216, 218, 220, 222, 224, 232, 234 and 236can be turned off at different times to adjust the thickness uniformityof metal layer 121 (FIG. 1A) on wafer 31 (FIG. 24B).

With reference now to FIGS. 27A, B, and C, three additional alternativeembodiments of the present invention, according to various aspects ofthe present invention, are shown. The embodiment of FIG. 27 A is similarto that of FIGS. 24A and 24B except that, in the present alternativeembodiment, three bars are used. The angle between two adjacent bars ispreferably about 60°. The embodiment of FIG. 27B is similar to those ofFIGS. 24A and 24B except that four bars are used. The angle between twoadjacent bars is preferably about 45°. The embodiment of FIG. 27 C issimilar to those of FIGS. 24A and 24B except that half of a bar is used.It should be recognized, however, that any number of bars can be usedwithout deviating from the spirit and/or scope of the present invention.Additionally, the adjacent bars can be set at various angles againwithout deviating from the spirit and/or scope of the present invention.

In the alternative embodiments described thus far, the electropolishingsequence can be started from valves close to the periphery of wafer 31,or started from the center of wafer 31, or started randomly. Startingfrom the center of wafer 31 is preferred since the non-polished metallayer 121 (FIG. 1A) (with larger diameter) can be used to conductcurrent for polishing the next portion of metal layer 121 (FIG. 1A)(with smaller diameter).

With reference now to FIGS. 28A and 28B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 28A and 28B issimilar to that of FIGS. 24A and 24B except that position fixed valves202, 204, 206, 208, 210, 212, 214, 216 and 218 have been replaced by twomoveable jets 254. Moveable jets 254 are disposed adjacent wafer 31 andapply electrolyte 34 onto specific portions of wafer 34. Moveable jets254 also sit on guide bar 250, and can move along the X direction asshown in FIGS. 28A and 28B. Additionally, in the present exemplaryembodiment, fresh electrolyte is supplied through flexible pipe 258.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 200;

Step 2: Turn on pump 33, LMFC 55, and driving mechanism 30. Turn onvalves 356, such that electrolyte 34 only contacts the portions of wafer31 above valves 356. In this manner, metal layer 121 (FIG. 1A) on theportions of wafer 31 above valves 356 are suitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 200, LMFC 55, and valves 356;

Step 4: Move cathode jet 254 to the next position; and

Step 5: Repeat steps 1 to 4 until metal layer 121 (FIG. 1A) has beenelectropolished from wafer 31.

With reference now to FIGS. 29A and 29B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 29A and 29B issimilar to that of FIGS. 28A and 28B except that two additional moveablecathode jets are added in the Y direction in order to increasingpolishing speed. However, the process sequence is similar to that ofFIGS. 28A and 28B.

With reference now to FIGS. 30A and 30B, another alternative embodimentof the present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIGS. 30A and 30B is similar tothat of FIGS. 28A and 28B except that wafer 31 is immersed intoelectrolyte 34. Moveable jets 254 are disposed adjacent to wafer 31 tofocus polishing current on a specific portion of wafer 31. In thepresent alternative embodiment, the gap between moveable jet 254 andwafer 31 can be in the range of about 0.1 millimeters to about 5millimeters, and preferably about 1 millimeter. Again, the processsequence is similar to that of FIGS. 28A and 28B.

With reference now to FIGS. 31A and 31B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 31A and 31B issimilar to that of FIGS. 30A and 30B except that fresh electrolyte 34can be delivered through pipe 260 instead of moveable jets 252 and 254through flexible pipe 258. Wafer 31 also can be immersed in electrolyte34, and moveable jets 252 and 254 can be disposed adjacent to wafer 31to focus polishing current on a specific portion of wafer 31. In thepresent alternative embodiment, the gap between moveable jets 252 and254 and wafer 31 can be in the range of about 0.1 millimeters to about 5millimeters, and preferably about 1 millimeter. Again the processsequence is similar to that of FIGS. 28A and 28B.

With reference now to FIGS. 32A, 32B, 32C and 32D, four additionalalternative embodiments of the present invention, according to variousaspects of the present invention, are shown. FIG. 32A shows a moveablejet, which preferably includes cathode 252 and case 262. Case 262 can besuitably formed from an insulator material, such as Teflon, CPVC, PVDF,Polypropylene, and the like. FIG. 32B shows a moveable jet consisting ofcathode 266 and case 264. Electrolyte 34 can be delivered through a holesuitably formed at the bottom of case 264. FIG. 32 C shows a moveablejet, which preferably includes cathode 262, electrodes 274 and 270,insulator spacer 272, case 262, and power supplies 276 and 268.Electrode 274 can be suitably connected to the negative output of powersupply 276, and electrode 270 can be connected to wafer 31. Inaccordance with one aspect of the present invention, electrode 276preferably traps metal ions flowing out of case 262, therefore reducingfilm buildup in the area outside of case 262. Additionally, electrode270 preferably prevents electrical field leakage from electrode 276 tominimize etch effect. The embodiment of FIG. 32D is similar to that ofFIG. 32C, except that case 264 has a hole at the bottom for electrolyte34.

With reference now to FIGS. 34A, 34B, 34C and 34D, four additionalalternative embodiments of the present invention, according to variousaspects of the present invention, are shown. The embodiment of FIG. 34 Ais similar to those of FIGS. 28A and 28B except that three bars arepreferably used. The angle between two adjacent bars can be preferablyabout 60°. The embodiment of FIG. 34B is similar to those of FIGS. 28Aand 28B except that four bars are preferably used. The angle between twoadjacent bars can be preferably about 45°. The embodiment of FIG. 34 Cis similar to those of FIGS. 28A and 28B except that half of a bar isused. Again, it should be recognized that any number of bars can beemployed without deviating from the spirit and/or scope of the presentinvention. Additionally, any two adjacent bars can be separated by anydesired angle without deviating from the spirit and/or scope of thepresent invention. The embodiment of FIG. 34D is similar to those ofFIGS. 28A and 28B except that the straight bar is replaced by a spiralbar.

With reference now to FIG. 35, two additional alternative embodiments ofthe present invention, according to various aspects of the presentinvention, are shown. The embodiments of FIGS. 35A and 35B are similarto those of FIGS. 28A and 28B except wafer 31 can be positioned upsidedown and vertically, respectively.

With reference now to FIGS. 36A and 36B, another alternative embodimentof the present invention, according to various aspects of the presentinvention, is shown. The embodiment of FIGS. 36A and 36B is similar tothat of FIGS. 14A and 14B except that all cathodes are replaced by aone-piece cathode 8. In the present alternative embodiment, cathode 8can be suitably connected to single power supply 11.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFC 21 and valves 82, 83, and 84, turn off LMFCS 22,23, 24 and valve 81, such that electrolyte 34 only contacts the portionof wafer 31 above sub-polishing bath 66, and then flows back toelectrolyte reservoir 36 through the spaces between section walls 100and 103, 103 and 105, 105 and 107, 107 and 109. In this manner, metallayer 121 (FIG. 1A) is electropolished from the portion of wafer 31above sub-polishing bath 66;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 11 and turn off LMFC 21;

Step 4: Repeat steps 1 to 3 for LMFC 22 (turn on LMFC 22, valves 81, 83,84, and power supply 11, and turn off LMFCs 21, 23, and 24, valve 82);

Step 5: Repeat steps 1 to 3 for LMFC 23 (turn on LMFC 23, valves 81, 82,84, and power supply 11, and turn off LMFCs 21, 22, and 24, valve 83);and

Step 6: Repeat steps 1 to 3 for LMFC 24 (turn on LMFC 24, valves 81, 82,83, and power supply 11, and turn off LMFCs 21, 22 and 23, and valve84).

In the above described polishing process, instead of polishing from theperiphery of wafer 31 to the center of wafer 31, the polishing also canbe performed from center to periphery, or can be performed randomlychoosing various cathode sequences.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFCs 21, 22, 23 and 24 and turn off valves 81, 82, 83and 84. The flow rate of electrolyte 34 from each LMFC 21, 22 and 23 canbe suitably set proportionate to the surface area of wafer 31 covered bythe corresponding cathode; and

Step 3: Turn off power supply 11 and LMFCs 21, 22, 23 and 24 until metallayer 121 (FIG. 1A) reaches a set value or thickness. Also, powersupplies 11, 12 and 13 can be turned off at different times to adjustthe thickness uniformity of metal layer 121 (FIG. 1A).

LMFCs can be turned off at different times in order to adjust theelectropolishing film thickness uniformity as shown in FIG. 37. At timet₁, only LMFCs 21, 23, and 24 are turned off, and valves 81, 83, and 84are also turned off. Therefore, electrolyte 34 does not contact wafer 31except for the portion of wafer 31 above sub-polishing bath 64. As thepower supply 11 remains turned on, metal layer 121 (FIG. 1A) can besuitably electropolished from the portion of wafer 31 abovesub-polishing bath 64. At time t₂, LMFC 22 is turned off. Similarly,LMFC 24 is turned on at time t₃ and turned off at time t₄ to obtainextra polishing of portions of wafer 31 above sub-polishing bath 60.Times t₂ and t₄ can be fine-tuned by measuring wafer thicknessuniformity.

With reference now to FIGS. 38A and 38B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 38A and 38B issimilar to that of FIGS. 7A and 7B except that all cathodes areconnected to single power supply 11. Since the electrolyte only contactsthe portion of wafer 31 being selectively electropolished, a majority ofthe polishing current will come from the cathode and go to that portionof wafer 31. The polishing process steps are similar to those of FIGS.7A and 7B, with power supply 11 replacing power supplies 12 and 13.

With reference now to FIGS. 39A and 39B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. The embodiment of FIGS. 39A and 39B issimilar to that of FIGS. 38A and 38B except that section walls 101, 103,105, 107 and 109 can move up and down to adjust the flow pattern. Asshown in FIG. 41, section walls 105 and 107 are moved up, so that theelectrolyte flows toward the portion of wafer 31 above section walls 105and 107.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFC 21 only and move section walls 101 and 103 close towafer 31, such that electrolyte 34 only contacts the portion of wafer 31above section walls 101 and 103. In this manner, metal layer 121 (FIG.1A) on the portion of wafer 31 above section walls 101 and 103 issuitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 11, turn off LMFC 21, and move section walls 101and 103 to a lower position;

Step 4: Repeat steps 1 to 3 for section walls 105 and 107, using LMFC 22and section walls 105 and 107, respectively; and

Step 5: Repeat steps 1 to 3 for section wall 109, using LMFC 23 andsection wall 109.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFCs 21, 22 and 23, and move all section walls 101,103, 105, and 107 and tube 109 close to wafer 31. The flow rate ofelectrolyte 34 from LMFCs 21, 22, 23 and 24 can be suitably setproportionate to the surface area of wafer 31 covered by thecorresponding cathode; and

Step 3: Move all section walls down to a lower position, and turn offall LMFCs at the same time, then turn off power supply 11. Each pair ofsection walls can also be moved down at a different time, with powersupply 11 on, in order adjust thickness uniformity. For example, asshown in FIGS. 39A and 39B, section walls 105 and 107 are being kept athigher positions with LMFC 22 on. Wafer 31 will be selectivelyelectropolished in the area between section walls 105 and 107.

With reference now to FIGS. 40A and 40B, another alternative embodimentof the present invention, according to various aspects of the presentinvention, is shown. FIGS. 40A and 40B illustrate an embodiment withmultiple power supplies and a single LMFC for polishing metal layer 121(FIG. 1A) directly on a substrate with a barrier layer on top. Theembodiment of FIGS. 40A and 40B is similar to that of FIGS. 14A and 14Bexcept that LMFCs 21, 22, 23 and 24 are replaced by a single LMFC 55.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 11 to output negative potential toelectrode 4, and turn on power supplies 12, 13, and 14 to outputpositive or zero potential to electrodes 3, 2, and 1, respectively;

Step 2: Turn on LMFC 55, thereby immersing the whole wafer intoelectrolyte 34. In this manner, metal layer 121 (FIG. 1A) will bepolished away only from the portion of wafer 31 above cathode 4;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 11;

Step 4: Repeat steps 1 to 3 for cathode 3 (turn on power supply 12 tooutput positive potential to cathode 3, and power supplies 11, 13 and 14to output negative potential to cathodes 4, 2 and 1);

Step 5: Repeat steps 1 to 3 for cathode 2 (turn on power supply 13 tooutput positive potential to cathode 2, and power supplies 11, 12 and 14to output negative potential to cathodes 4, 3 and 1); and

Step 6: Repeat steps 1 to 3 for cathode 1 (turn on power supply 14 tooutput positive potential to cathode 1, and power supplies 11, 12 and 13to output negative potential to cathodes 4, 3 and 2).

FIG. 41 shows the power supply turn on/off sequence for polishing waferareas 4 (above cathode 4), 3, 2, and then 1. The power supply outputwave form can be selected from a variety of wave forms such as amodified sine-wave form, a unipolar pulse, a pulse reverse, apulse-on-pulse, or a duplex pulse, as shown in FIG. 42.

In the above selective electropolishing process, instead ofelectropolishing from the periphery to the center of the wafer,electropolishing can also be performed from center to periphery, or canbe performed randomly by choosing an arbitrary cathode sequence.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supplies 11, 12, 13 and 14. The current of eachpower supply 11, 12, 13 and 14 can be suitably set proportionate to thesurface area of wafer 31 covered by the corresponding cathode.

Step 2: Turn on LMFC 55; and

Step 3: Turn off power supplies 11, 12, 13 and 14 at the same time whenmetal layer 121 (FIG. 1A) reaches a set value or thickness. Also, powersupplies 11, 12, 13 and 14 can be turned off at different times toadjust the thickness uniformity of metal layer 121 (FIG. 1A).

With reference now to FIGS. 43A and 43B, still another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. FIGS. 43A and 43B show an embodiment of theapparatus with multiple power supplies and a single LMFC for polishingmetal layer 121 (FIG. 1A) directly on substrate 123 (FIG. 1A) withbarrier layer 122 (FIG. 1A) on top. The embodiment of FIGS. 43A and 43Bis similar to that of FIGS. 40A and 40B except that section walls canmove up and down to adjust the flow pattern. As shown in FIGS. 43A and43B, section walls 105 and 107 can be moved up, so that the electrolyteflows toward the portion of wafer 31 above walls 105 and 107.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFC 55 and move section walls 101 and 103 adjacent towafer 31, such that electrolyte 34 only contacts the portion of wafer 31above section walls 101 and 103. In this manner, metal layer 121 (FIG.1A) on the portion of wafer 31 above section walls 101 and 103 issuitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 11, and move section walls 101 and 103 to a lowerposition;

Step 4: Repeat steps 1 to 3 for section wall 105 and 107, using sectionwalls 105 and 107 and power supply 12; and

Step 5: Repeat steps 1 to 3 for section wall 109, using section wall 109and power supply 13.

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supplies 11, 12, and 13. The current through eachpower supply 11, 12 and 13 can be suitably set proportionate to thesurface area of wafer 31 that is covered by the corresponding cathode;

Step 2: Turn on LMFC 55, and move all section walls 101, 103, 105, 107and section wall 109 close to wafer 31; and

Step 3: Turn off power supplies 11, 12 and 13 at the same time when thethickness uniformity of metal layer 121 (FIG. 1A) reaches a set value orthickness. Also, power supplies 11, 12 and 13 can be turned off atdifferent times to adjust the thickness uniformity of metal layer 121(FIG. 1A).

With reference now to FIGS. 44A and 44B, yet another alternativeembodiment of the present invention, according to various aspects of thepresent invention, is shown. FIGS. 44A and 44B show an embodiment of theapparatus with a single power supply and single LMFC for polishing metallayer 121 (FIG. 1A) directly on substrate 123 (FIG. 1A) with barrierlayer 122 (FIG. 1A) on top. The embodiment of FIGS. 44A and 44B issimilar to that of FIGS. 43A and 43B except that one power supply 11 isused, and all cathodes are connected to single power supply 11.Similarly, section walls can move up and down to adjust the flowpattern. As shown in FIGS. 44A and 44B, section walls 105 and 107 can bemoved up, so that the electrolyte flows toward the portion of waferabove wall 105 and 107.

Using the present alternative embodiment described above, the followingprocess steps can be suitably employed to selectively electropolishportions of wafer 31:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFC 55 and move section walls 101 and 103 close towafer 31, such that electrolyte 34 only contacts the portion of wafer 31above section walls 101 and 103. In this manner, metal layer 121 (FIG.1A) on the portion of wafer 31 above section walls 101 and 103 issuitably electropolished;

Step 3: When metal layer 121 (FIG. 1A) reaches a set value or thickness,turn off power supply 11, and move section walls 101 and 103 to a lowerposition;

Step 4: Repeat steps 1 to 3 for section walls 105 and 107 (move sectionwalls 105 and 107 up close to wafer 31, and turn on power supply 11);and

Step 5: Repeat steps 1 to 3 for section walls 109 (move section wall 109up close to wafer 31, and turn on power supply 11).

In addition to selectively electropolishing portions of wafer 31, usingthe present alternative embodiment described above, the followingprocess steps can be employed to electropolish the entire surface ofwafer 31 at one time:

Step 1: Turn on power supply 11;

Step 2: Turn on LMFC 55, and move all section walls 101, 103, 105, 107and 109 up close to wafer 31; and

Step 3: Move all section walls down to a lower position at the sametime, then turn off power supplies 11. Each pair of section walls canalso be moved down at different times, with power supply 11 on, in orderadjust thickness uniformity. For example, as shown in FIGS. 44A and 44B,section walls 105 and 107 are being kept at higher position with powersupply 11 on. Wafer area above section wall 105 and 107 will have extrapolishing film on that portion. The extra polishing time length andlocation can be determined by analyzing the thickness uniformity ofwafer through later film characterization.

With reference now to FIGS. 45 and 46, two additional alternativeembodiments of the present invention, according to various aspects ofthe present invention, are shown. FIGS. 45 and 46 show embodimentsconfigured with an in-situ film thickness uniformity monitor. Sensors500 can be ultrasonic type thickness measurement sensors. Signaldetected from sensors 500 is sent back to computer 502. The in-situthickness data can be used to adjust or control polishing uniformity andfinal thickness.

With reference now to FIG. 58, one embodiment of the present inventionincludes a drive mechanism 1000, a chuck 1002, a wafer 1004, aninjection nozzle 1008, and an end-point detector 1006. During theelectropolishing process, drive mechanism 1000 can be configured torotate wafer 1004 (indicated in FIG. 58 as about the z-axis). Drivemechanism 1000 can also be configured to move wafer 1000 horizontallyrelative to nozzle 1008 (indicated in FIG. 58 as the x-direction). Asalluded to earlier with regard to another embodiment, this movement ofthe wafer during electropolishing can enhance the uniformity of theelectropolished wafer surface.

Additionally, during the electropolishing process, end-point detector1006 is configured to detect the thickness of the metal layer on wafer1004. As described above with regard to the embodiments depicted inFIGS. 45 and 46, end-point detector 1006 can include various sensors,such as ultrasonic sensors. In the present embodiment, end-pointdetector 1006 is configured as an optical reflection sensor.Accordingly, as the metal layer is electropolished, end-point detector1006 responds to the changing reflectivity of the wafer surface.

More particularly, with reference to FIG. 59, for illustrative purpose,a graph depicting the changes in the reflectivity of a wafer surface isshown. It should be recognized, however, that the shape of the curvedepicted in FIG. 59 can vary depending on the particular application.

In the graph in FIG. 59, the portion of the line before point Acorresponds to the portion of the electropolishing process when themetal layer on the wafer surface is being removed. The reflectivity ofthe wafer surface does not change significantly during this portion ofthe electropolishing process because the wafer surface remains coveredby the metal layer.

In the graph in FIG. 59, point A corresponds to the portion of theelectropolishing process when the metal layer has nearly been removedfrom the surface of the wafer, but the trenches and/or vias remainfilled with the metal layer. At this point, the reflectivity begins tochange because the barrier layer and/or dielectric layer typically has adifferent reflection rate than the metal layer.

In the graph in FIG. 59, point C corresponds to the portion of theelectropolishing process when the metal layer has been completelyremoved from the 30 surface of the wafer. At this point, thereflectivity begins to level off again.

Thus, to facilitate a smooth, planar, and non-recessed wafer surface,the electropolishing process is stopped between points A and C. Towardthis end, end-point detector 1006 can be configured to provide theoptical reflection rate of an area of the wafer during electropolishing.

More particularly, the local reflection rate of an area of the waferR_(light) can be expressed as follows:R _(light) =R _(light)(r, θ)Where, r is the radius of the area being electropolished. θ is therotating angle of the area being electropolished.

The electropolishing process can be stopped or ended when R_(light)measured by end-point detector 1006 reaches a predetermined rateR_(target). The value of R_(target) can be determined experimentally.For example, wafers can be processed at various R_(target) settings todetermine the value that produces the desired wafer surface profile.Once this value is determined, it can be used to process additionalwafers.

Alternatively, R_(target) can be calculated based on the patternstructure on the wafer. More particularly, each area of the waferincludes a portion with metal layers formed within trenches and/or viasand the remaining portion with a barrier layer and/or dielectric layer.Thus, a pattern density PD can be calculated as follows:

${PD} = \frac{{SA}_{ML}}{{SA}_{T}}$Where, SA_(ML) is the surface area with trenches and/or vias. SA_(T) isthe total surface area. The values for SA_(ML) and SA_(T) of anylocation on the wafer can be obtained from the mask design of the wafer.The target optical reflectivity R_(target) can then be calculated asfollows:R _(target)=(R _(ML) ×PD)+[R _(barrier)×(1−PD)]Where, R_(ML) is the reflectivity of the metal layer. R barrier is thereflectivity of the barrier layer. It should be recognized that if thewafer does not include a barrier layer, then R_(barrier) would be thereflectivity of the dielectric layer.

Thus, at any location r and θ on the wafer, end-point detector 1006provides a measurement of the optical reflectivity R_(light). For thatlocation, the target optical reflectivity R_(target) can be calculatedbased on the pattern density PD data obtained from the mask design ofthe wafer. When the measured optical reflectivity R_(light) equals thetarget optical reflectivity R_(target), then electropolishing can bestopped for that area.

As described earlier with regard to various embodiments, theelectropolishing process can be stopped or ended entirely (for example,by turning off the power supply). Alternatively, the electropolishingrate can be reduced to continue to monitor the reflectivity of the metallayer on the wafer surface. If the reflectivity increases (for example,as in unpolished patches or areas of the wafer), then theelectropolishing rate can be increased.

As also described earlier with regard to various embodiments, the powersupply (not shown) can be operated in DC mode or in a variety of pulsemodes. Additionally, it can be operated in constant current mode,constant voltage mode, or combination of these modes. Further, when apulsed power supply is used, the duty cycle can be constant or varied.

With reference now to FIG. 60, as wafer 1004 is rotated and movedhorizontally, the metal layer on the wafer surface can beelectropolished from the center to the edge of wafer 1004 in a spiralpattern. It should be recognized, however, that wafer 1004 can beelectropolished in any pattern or order. For example, wafer 1004 can beelectropolished beginning from the edge to the center of wafer 1004.Alternatively, wafer 1004 can be electropolished beginning and endingfrom any points between the edge and the center of wafer 1004.

Additionally, the signals from end-point detectors 1006 can be used tocontrol the speed of the rotation and horizontal movement of wafer 1004.It can also be used to control the polishing power and the polishingrate used. More particularly, the signals from end-point detectors 1006can be provided to an analyzer 1009. Analyzer 1009 is configured toevaluate and process the signals received from end-point detectors 1006.Based on these signals, analyzer 1009 can then control the rotation andhorizontal movement of wafer 1004, the polishing power, and thepolishing rate. Analyzer 1009 can include any convenient processingprocessor, such as an electronic circuit, a computer chip, a computer,and the like. Analyzer 1009 can also include any convenient programminginstructions or software needed to carry out the various functionsdescribed herein.

When the wafer is translated with constant horizontal speed and thepolishing power is constant, the rotation speed can be altered asfollows:ω=C ₁ /{[R _(light)(r, θ)−R _(target)(r, θ)]^(N) r}where, ω is the speed of rotation of wafer 1004. r is the distancebetween nozzle 1008 and the center of wafer 1004. C₁ is a constant. Ncan include any number including integer, rational and irrationalfraction. Values for C₁ and N can be determined experimentally to tunethe electropolishing process to produce the desired wafer surfaceprofile.

When the wafer is translated with constant horizontal speed and thepolishing power is varied, the rotation speed can be expressed asfollows:

$\quad\left\{ \begin{matrix}{\omega = {v_{0}/r}} \\{P_{polishing} = {C_{2}\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack}^{N}}\end{matrix} \right.$Where, ω is the speed of rotation of wafer 1004. r is the distancebetween nozzle 1008 and the center of wafer 1004. v₀ is the constanttangent speed of the area of wafer 1004 relative to nozzle 1008.P_(polishing) is the electropolishing power being applied. This caninclude DC or pulsed power. It can include power provided in constantcurrent mode, constant voltage mode, or combination of these modes.Also, when a pulsed power is used, the duty cycle can be constant orvaried. C₂ is a constant. N can include any number, such as integer,rational and irrational fractions, and the like. Values for C₂ and N canbe determined experimentally to tune the electropolishing process toproduce the desired wafer surface profile.

When the wafer is translated with constant rotation speed and thepolishing power is constant, the horizontal speed can be expressed asfollows:v _(r) =C ₃ /{[R _(light)(r, θ)−R _(target)(r, θ)]^(N) r}Where, v_(r) is the horizontal speed of wafer 1004. r is the distancebetween nozzle 1008 and center of wafer 1004. C₃ is a constant. N caninclude any number, such as integer, rational and irrational fractions,and the like. Values for C₃ and N can be determined experimentally totune the electropolishing process to produce the desired wafer surfaceprofile.

When the wafer is translated with constant rotation speed and thepolishing power can be varied, the horizontal speed can be expressed asfollows:

$\quad\left\{ \begin{matrix}{v_{r} = {C_{4}/r}} \\{P_{polishing} = {C_{5}\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack}^{N}}\end{matrix} \right.$where, v_(r) is the horizontal speed of wafer 1004. r the horizontaldistance between nozzle 1008 and center of wafer 1004. P_(polishing) isthe electropolishing power being applied. This can include DC or pulsedpower. It can include power provided in constant current mode, constantvoltage mode, or combination of these modes. Also, when a pulsed poweris used, the duty cycle can be constant or varied. C₄ and C₅ areconstants. N can include any number, such as integer, rational andirrational fractions, and the like. Values for C₄, C₅, and N can bedetermined experimentally to tune the electropolishing process toproduce the desired wafer surface profile.

When just the polishing power is constant, then the rotation speed andthe horizontal movement speed can be expressed as follows:

$\left\{ {\begin{matrix}{\omega = {C_{6}/\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack^{N}}} \\{v_{r} = {C_{7}/\left\{ {\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack^{N}r} \right\}}}\end{matrix}{or}\left\{ \begin{matrix}{\omega = {C_{6}/\left\{ {\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack^{N}r} \right\}}} \\{v_{r} = {C_{7}/\left\lbrack {{R_{light}\left( {r,\theta} \right)} - {R_{target}\left( {r,\theta} \right)}} \right\rbrack^{N}}}\end{matrix} \right.} \right.$Where, ω is the speed of rotation of wafer 1004. r is the horizontaldistance between nozzle 1008 and the center of wafer 1004. v_(r) is thehorizontal speed of wafer 1004. C₆ and C₇ are constants. N can includeany number, such as integer, rational and irrational fractions, and thelike. Values for C₆, C₇, and N can be determined experimentally to tunethe electropolishing process to produce the desired wafer surfaceprofile.

When the polishing power can be varied, then the rotation speed and thehorizontal movement speed can be expressed as follows:ω=C ₆ /[R _(light)(r, θ)−R _(target)(r, θ)]^(N){v _(r) =C ₇ /{[R _(light)(r, θ)−R _(target)(r, θ)]^(N) r}P _(polishing) =C ₅ [R _(light)(r, θ)−R _(target)(r, θ)]^(N)orω=C ₆ /[{R _(light)(r, θ)−R _(target)(r, θ)]^(N) r}{v _(r) =C ₇ /[R _(light)(r, θ)−R _(target)(r, θ)]^(N)P _(polishing) =C ₅ [R _(light)(r, θ)−R _(target)(r, θ)]^(N)

Where, ω is the speed of rotation of wafer 1004. r is the distancebetween nozzle 1008 and the center of wafer 1004. v_(r) is thehorizontal speed of wafer 1004. P_(polishing) is the electropolishingpower being applied. This can include DC or pulsed power. It can includepower provided in constant current mode, constant voltage mode, orcombination of these modes. Also, when a pulsed power is used, the dutycycle can be constant or varied. C₅, C₆, and C₇ are constants. N caninclude any number, such as integer, rational and irrational fractions,and the like. Values for C₅, C₆, C₇, and N can be determinedexperimentally to tune the electropolishing process to produce thedesired wafer surface profile.

In one exemplary embodiment, where the electrolyte used for theelectropolishing process is 85% (wt.) H2PO4 and for a 300 mm wafer, wcan be in the range of about 1 to about 500 revolutions per minute. Vrcan be in the range of about 0.01 cm/second to about 1 cm/second. R canbe in the range of about 0.1 cm to about 15 cm for a nozzle with aninner diameter of about 0.1 cm. The polishing current density can rangebetween 0 mA/cm² to about 50 mA/cm². The polishing voltage density canrange between about 0 volts to about 5 volts. It should be recognized,however, that these values are only exemplary and that they can varydepending on the particular application.

With reference now to FIG. 61, another embodiment of the presentinvention includes an additional end-point detector 1010. In the presentembodiment, end-point detector 1010 can be configured to provide theoptical reflection profile after electropolishing of an area of thewafer surface. Thus, end-point detectors 1006 and 1010 can be configuredto provide the optical reflection profile during and afterelectropolishing of an area on the wafer surface.

With reference now to FIG. 62, another embodiment of the presentinvention includes a third additional end-point detector 1012. In thepresent embodiment, end-point detector 1012 can be configured to providethe optical reflection profile before electropolishing of an area of thewafer surface. The difference of reflection rate measured by end-pointdetectors 1010 and 1012 can be used to determine the electropolishingrate in a single rotation of wafer 1004. This information can beprovided to a computer to tune the polishing process. More particularly,adjustments can be made to the polishing power, rotation speed,horizontal speed of wafer 1004, and the like.

With reference now to FIG. 63A, another embodiment of the presentinvention includes a fourth end-point detector 1014. In the presentembodiment, end-point detector 1014 can be configured to provide theelectropolishing status after one complete electropolishing cycle (i.e.,the nozzle moves relatively from center to edge of the wafer one time).This information can be provided to a computer to tune the polishingprocess. More particularly, adjustments can be made to the polishingpower, rotation speed, horizontal speed of wafer 1004, and the like.

With reference now to FIG. 63B, another embodiment of the presentinvention includes a fifth end-point detector 1016. In the presentembodiment, end-point detector 1016 can be configured to provide theelectropolishing status before electropolishing. The difference ofreflection rate measured by end-point detectors 1014 and 1016 can beused to determine the electropolishing rate of one electropolishingcycle. This information can be provided to a computer to tune thepolishing process. More particularly, adjustments can be made to thepolishing power, rotation speed, horizontal speed of wafer 1004, and thelike.

With reference now to FIG. 64A, another embodiment of the presentinvention includes an additional end-point detector 1020 inside ofnozzle 1008. In the present embodiment, end-point detector 1020 can beconfigured to detect the electropolishing uniformity in the area beingelectropolished. The difference of reflection rate measured by end-pointdetectors 1010 and 1020 can be used to determine the polishing profilein the area being electropolished on a real-time basis (i.e., at thetime of electropolishing). This information can be provided to acomputer to tune the polishing process. More particularly, adjustmentscan be made to the polishing power, rotation speed, horizontal speed ofwafer 1004, and the like.

With reference now to FIG. 64B, another embodiment of the presentinvention includes a third end-point detector 1030 inside of nozzle1008. In the present embodiment, end-point detector 1030 can beconfigured to detect the electropolishing uniformity in the area beingelectropolished. The difference of reflection rate rate measured byend-point detectors 1010, 1020, and 1030 can be used to determine thepolishing profile in the area being electropolished. This informationcan be provided to a computer to tune the polishing process. Moreparticularly, adjustments can be made to the polishing power, rotationspeed, horizontal speed of wafer 1004, and the like.

With reference now to FIG. 64C, another embodiment of the presentinvention includes a fourth end-point detector 1040 inside of nozzle1008. In the present embodiment, end-point detector 1040 can beconfigured to detect the electropolishing uniformity in the area beingelectropolished. The difference of reflection rate measured by end-pointdetectors 1010 and 120 can be used to determine the electropolishingprofile in the x-direction (as depicted in FIG. 15C). The difference ofreflection rate measured by end-point detectors 1030 and 1040 can beused to determine the electropolishing profile in the y-direction. Thisinformation can be provided to a computer to tune the polishing process.More particularly, adjustments can be made to the polishing power,rotation speed, horizontal speed of wafer 1004, and the like.

With reference to FIG. 64D, another embodiment of the present inventionincludes a fifth end-point detector 1050 inside of nozzle 1008. Itshould be recognized that any number of end-point detectors can bedisposed within nozzle 1008 to detect the electropolishing uniformity inthe area being electropolished.

Thus far, the end-point detectors described above have been depicted ashaving circular shapes. But it should be recognized that they can alsoinclude various alternative shapes. For example, with reference now toFIGS. 65A to E, end-point detector 1006 is depicted as having acircular, a triangular, a square, a trapezoidal, and an ellipticalshape.

Additionally, thus far, nozzle 1008 has been depicted as having acircular shape. But it should be recognized that it can also includevarious alternative shapes. For example, with reference now to FIGS. 66Ato E, nozzle 1008 is depicted as having a circular, a triangular, asquare, a trapezoidal, and an elliptical shape.

With reference now to FIGS. 67A and B, another embodiment of the presentinvention includes drive mechanism 1000, chuck 1002, wafer 1004. Thepresent embodiment also includes a polishing receptacle 1100, which isdivided into multiple sections by section walls 1103, 1105, 1107, and1109. Cathodes 1, 2, 3, and 4 are disposed within these sections.Additionally, end-point detectors 600, 602, 604, 606, 608, 610, 612, and614 are configured measure the electropolishing uniformity of wafer1004. More particularly, an optical fiber 504 can be connected to eachend-point detector 600, 602, 604, 606, 608, 610, 612, and 614. Asdepicted in FIG. 67A, optical fiber 504 extends into the sections ofpolishing receptacle 1100. The end-point detectors are also connected toanalyzer 1009 that is configured to evaluate and/or process the signalsreceived from the end-point detectors. Analyzer 1009 can be anyconvenient processor, such as a circuit, a computer chip, a computer,and the like. Analyzer 1009 can also include any convenient programminginstructions or software needed to carry out the various functionsdescribed herein

As described in greater detail with regard to various alternativeembodiments, wafer 1004 can be electropolished by delivering anelectrolyte into polishing receptacle 1100. More particularly, theelectrolyte can be directed to any one or more of the sections ofreceptacle 1100 defined by section walls 1103, 1105, 1107, and 1109. Anelectrical charge is then applied to the electrolyte through cathodes 1,2, 3, and 4. During the electropolishing process, wafer 1004 is held bychuck 1002 and rotated by drive mechanism 1000. In the manner describedabove, this electropolishing process can be controlled using end-pointdetectors 600, 602, 604, 606, 608, 610, 612, and 614 to produce thedesired wafer surface profile.

After this initial electropolishing process is completed, an additionalelectropolishing process can be provided by injecting electrolytethrough a nozzle disposed within the first section defined by sectionwall 1109. An electrical charge is applied through cathode 1. Wafer 1004is then translated horizontally by drive mechanism 1000. In the mannerdescribed above, this electropolishing process can be controlled usingend-point detectors 606 and 608.

By way of example, the following is an exemplary process for controllingthe electropolishing of wafer 1004:

Step 1: Turn on electrolyte flow to all sections of receptacle 1100, androtate wafer 1004;

Step 2: Apply an electrical charge to the electrolyte through cathodes1, 2, 3, and 4;

Step 3: When reflectivity measured by each end-point detector 600, 602,604, 606, 608, 610, 612, and 614 reaches a predetermined value, turn offflow of electrolyte and electrical charge;

Step 4: Turn on electrolyte flow to nozzle disposed within sectiondefined by section wall 1109, apply charge through cathode 1, and movechuck 1004 horizontally such that flow of electrolyte moves across thesurface of wafer 1004 from center to edge through a spiral path;

Step 5: Using measurements provided by end-point detectors 606 and 608,control the polishing power, rotating speed, and horizontal movementspeed;

Step 6: Repeat steps 4 and 5 until the desired surface is obtained onwafer 1004; and

Step 7: Stop process, unload wafer 1004, and load new wafer forelectropolishing.

It should be recognized that various modifications can be made to theabove process steps. For example, in step 3, the electrolyte flow andpower can be turned off based on target optical reflectivity calculatedfrom pattern density data rather than a predetermined value for theoptical reflectivity. Also, in step 4, wafer 1004 can be moved invarious directions to apply the electrolyte moves across wafer 1004 inany desired pattern.

With reference now to FIG. 47, another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. FIG. 47 shows an embodiment configured to be astand-alone, fully computer-controlled wafer-processing tool withautomatic wafer transfer, cleaning module with wafer dry-in and dry-outcapability. It preferably includes five stacked polishing receptacles300, 302, 304, 306 and 308, five stacked cleaning/dry chambers 310, 312,314, 316 and 318, robot 322, wafer cassettes 320 and 321, electrolytereservoir 36, and plumbing box 330. As described before, polishing bath300 preferably includes a plurality of cathodes, a plurality of powersupplies, a plurality of section walls or tubes, a wafer chuck, and adriving mechanism, which rotates or oscillates wafer 31 during theelectropolishing process. Electrolyte reservoir 36 preferably includes atemperature control sensor. Plumbing box 330 preferably includes of apump, LMFCs, valves, filters, and plumbing. The polishing system furtherpreferably includes a computer control hardware and an appropriateoperating software package. The operation process sequence is describedas follows:

Step A: Load wafer cassettes 320 and 321 manually or using robot 322;

Step B: Select recipe and push run button;

Step C: Initialize the system using the control software, includingchecking any and all system parameters, and monitoring for any alarmsexisting in the system;

Step D: After completing the initialization, robot 322 picks up a waferfrom cassette 320 or 321 and sends the wafer to one of the polishingreceptacles 300, 302, 304, 306, or 308

Step E: Metal layer 121 (FIG. 1A) on the wafer is then electropolished;

Step F: After electropolishing, robot 322 picks up the polished waferfrom the polishing receptacle, then transports it to one ofcleaning/drying chambers 310, 312, 314, 316, or 318;

Step G: The electropolished wafer is then cleaned;

Step H: The electropolished wafer is then dried using any convenientdrying process, such as spin-drying and/or N₂ purging; and

Step I: Finally, the dried wafer is then transported to cassette 320 or321 manually or by robot 322.

FIG. 48 shows the process sequence for polishing multiple waferssimultaneously. The process sequence for polishing multiple wafers issimilar to that for electropolishing a single wafer, except that thecomputer checks for any unprocessed wafers remaining in cassette 320 or321 after process step I. If there is an unprocessed wafer remaining incassette 320 or 321, then the system will return to step A (i.e.,loading new cassettes or exchanging cassettes). If there is still anunprocessed wafer remaining in cassette 320 and/or 321, the system willreturn to step D (i.e., robot 322 picks up the unprocessed wafer fromthe cassette and transports it to one of the polishing receptacles).

Process step E can preferably include a two-process step, the firstbeing to selectively electropolish metal layer 121 (FIG. 1A) on thewafer, and the second being to electropolish metal layer 121 (FIG. 1A)on the whole wafer simultaneously.

Instead of cleaning a wafer in one chamber, the cleaning process can beperformed in different chambers. The cleaning process can also consistof several steps, and each step can use different solutions, differentconcentrations of solutions, or different hardware.

Instead of arranging five polishing receptacles and five-cleaning/dryingchambers, the number of polishing receptacles and number ofcleaning/drying chambers can be varied from 1 to 10 as shown in thefollowing table:

TABLE 4 Type 1 2 3 4 5 6 7 8 9 No. of polishing receptacles 1 2 3 4 5 67 8 9 No. of cleaning/drying cham- 9 8 7 6 5 4 3 2 1 bersIn accordance with various aspects of the present invention, types 4, 5,6 and 7 in the above table are preferred.

With reference now to FIG. 49, another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. FIG. 49 shows an embodiment configured as awafer-polishing tool. The embodiment of FIG. 49 is similar to that ofFIG. 47, except that cassette 320 can be moved up and down by a robot323. The position of cassette 320 can be moved up and down to match theposition of the polishing receptacle or cleaning/dry chamber.Accordingly, robot 322 does not need to move in the Z direction whenpicking up an unprocessed wafer from cassette 320 or putting a polisheddry wafer back into cassette 320. In this manner, the operating speed ofrobot 323 can be suitably increased.

With reference now to FIG. 50, still another alternative embodiment ofthe present invention, according to various aspects of the presentinvention, is shown. The embodiment shown in FIG. 50 is similar to thatof FIG. 47 except that robot 322 itself can move in the X direction.Accordingly, robot 322 need not rotate about the Z axis.

With reference now to FIG. 51, yet another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. The embodiment shown in FIG. 51 is similar to thatof FIG. 47 except that polishing receptacles and cleaning/dryingchambers are put in one column. Compared with the embodiment of FIG. 47,the foot print of the system is reduced, however wafer throughput can beslower.

With reference now to FIG. 52, another alternative embodiment of thepresent invention, according to various aspects of the presentinvention, is shown. The embodiment shown in FIG. 52 preferably includesthree columns of polishing receptacles and cleaning/drying chambers,linearly moveable robot 322, operation screen 340, two cassettes stackedadjacent to each other, plumbing box 330, and electrolyte reservoir 36.The polishing process steps are similar to those described in FIG. 47.

FIG. 54 shows still another embodiment of apparatus for polishing metallayer 121 (FIG. 1A) in accordance with the present invention. Theembodiment of FIG. 54 is similar to that of FIGS. 28A and 28B exceptthat multi-jets are replaced by a single jet 255. Additionally, cathodejet 255 remains stationary while wafer 31 is moved along the X-axis(left and right). More particularly, in the present exemplaryembodiment, cathode jet 255 injects electrolyte onto selected portionsof wafer 31, while wafer 31 is rotated and moved in the X-axissubstantially simultaneously by drive means 30 and guide bar 35. Whenwafer 31 is moved to the left side, cathode jet 255 injects electrolyteon to the center portion of wafer 31. When wafer 31 is moved to theright side, cathode jet 255 injects electrolyte onto the peripheryportion of wafer 31. In accordance with one aspect of the presentinvention, the rotation speed of wafer 31 can be kept at a constant rateduring the polishing process. The speed with which wafer 31 is movedalong the x-axis can be varied from large to small as drive means 30moves the center portion of wafer 31 away from the cathode jet 255. Thisspeed of wafer 31 along the x-axis (Vx) can be expressed as follows:

$\begin{matrix}\begin{matrix}{{Vx} = {C/\left\lbrack {\pi\left( {x + r} \right)}^{2} \right\rbrack}} & {{{when}\mspace{14mu} x} < r} \\{C/\left\{ {\pi\left\lbrack {\left( {x + r} \right)^{2} - \left( {x - r} \right)^{2}} \right\rbrack} \right\}} & {{{when}\mspace{14mu} x} > r}\end{matrix} & \;\end{matrix}$Where C is a constant, x is the distance between center of wafer 31 andcathode jet 255 in the x-axis, and r the radius of liquid column made bycathode jet 255.

It should be recognized, however, that various modifications can be madeto the configuration of the wafer polishing cell without deviating fromthe spirit and/or scope of the present invention. For example, the anglebetween wafer 31 and cathode jet 255 can be kept at any constant angle,or the angle can be changed during the polishing process. The waferitself can be placed at any angle relative to polishing receptacle 100.In the embodiment of FIG. 54, jet 255 can be moved instead of movingwafer 31, or both jet 255 and wafer 31 can be moved to achieve the sameresults. In the embodiment of FIG. 54, wafer 31 can be immersed in theelectrolyte, instead of being contacted by the jet stream of theelectrolyte.

With reference again to FIG. 1B, after metal layer 121 iselectropolished from barrier layer 122 formed on mesas 126, a layer ofmetal can be replated on wafer 31 to fix recesses 127. As alluded toearlier, this replating process can be performed using any convenientplating process. One such process is an electroless plating process.

In general, electroless plating differs from electroplating in thatelectrodes are not used in electroless plating. In brief, metal ions areprovided in an electroless solution. More particularly the electrolesssolution typically contains a reducing agent that facilitates plating.

The use of electroless plating is particularly advantageous in thisapplication in that metal layer 121 in trenches 125 will tend to promoteplating, while barrier layer 122 will not. Also, electroless platinggenerally produces a more uniform deposition as it does not suffer fromohmic effects. Thus, recesses 127 can be fixed (i.e., filled in) usingan electroless plating process.

With reference now to FIGS. 68A and 68B, an electroless plating module1101 in accordance with one exemplary embodiment of the presentinvention is shown. As alluded to above and as will be described ingreater detail below, electroless plating module 1101 is configured toreplate a metal layer on wafer 31 (FIG. 1B) to fix recesses 127 (FIG.1B). Additionally, electroless plating module 1101 can be configured toclean and to dry wafer 1128. It should be recognized, however, thatelectroless plating module 1101 can be configured to perform variousprocesses depending on the particular application. For example, as willbe described with reference to various alternative embodiments,electroless plating module 1101 can be configured to perform an etchingprocess.

In one embodiment electroless plating module 1101 is configured to useany electroless solutions suitable for use with copper, such as coppersulfate (CuSiO4-5H2O) at about 8 g/l, EDTA (tetrasodium) at about 14g/l, formaldehyde (NCOOH) at 20 ml/l, Methyldichlorosilane (CH3Cl2SiH)at 0.25 g/l. It should be recognized, however, that the electrolesssolution can include various chemistries depending on the application.

Additionally, the electroless solution is maintained at between about 20degrees Celsius and about 80 degrees Celsius. Accordingly, a depositionrate of about 100 Angstroms per minute to about 1000 Angstroms perminute can be obtained. It should be recognized, however, that theelectroless solution can be maintained at various temperatures and thatvarious deposition rates can be used.

As depicted in FIGS. 68A and 68B, electroless plating module 1101preferably includes a module chamber 1116, a cover 1126, a wafer loadingdoor 1124, a chuck 1120, a motor 1118, and liquid/gas injection pipe1100, 1102, 1104, 1106, 1108, 1110, and 1112. In the present embodiment,module chamber 1116, cover 1126 and loading door 1126 are configured toseal electroless plating module 1101. In this manner, electrolessplating module 1101 can be sealed to isolate the environment withinelectroless plating module 1101 from the outside environment. This hasthe advantage of preventing contaminants from the outside environmentfrom entering electroless plating module 1101. It also has the advantageof preventing fluids and/or vapors from escaping from electrolessplating module 1101. Accordingly, as will be described below anddepicted in various drawing figures, wafer loading door 1124 opens andcloses to permit entry into electroless plating module 101. It should berecognized, however, that electroless plating module 1101 can includevarious alternative configurations. For example, electroless platingmodule 1101 can be configured without cover 1126 and loading door 1126.Accordingly, in this configuration, direct access can be gained toelectroless plating module 1101 without having to open and close waferloading door 1124. Alternatively, with reference to FIG. 69A,electroless plating module 1101 can include two wafer loading doors 1324and 1332. Accordingly, wafer 1128 can be loaded from one side andremoved from another side.

In the present embodiment depicted in FIGS. 68A and 68B, electrolessplating module 1101 includes a cover 1126 and one loading door 1124. Assuch, loading door 1124 opens to permit access into electroless platingmodule 1101. More particularly, loading door 1124 opens to permitloading and removal of wafer 1128 from electroless plating module 1101.It should be recognized that loading door 1124 can be opened and closedmanually or using any convenient actuator, such as spring, motor, robot,and the like.

In the present embodiment, wafer 1128 is loaded and removed fromelectroless plating module 1101 using robot 1122. It should berecognized that robot 1122 can be a robot specifically dedicated toloading and unloading electroless plating module 1101. Alternatively, aswill be described in greater detail below, electroless plating module1101 can be a component of a wafer processing tool in which robot 1122is a multipurpose robot. It should also be recognized that wafer 1128can be loaded and removed using various wafer transfer systems, such asair tracks, water tracks, and the like. As an additional alternative,wafer 1128 can be manually loaded and removed from electroless platingmodule 1101.

In the present embodiment, injection pipes 1100, 1102, 1104, 1106, 1108,1110, and 1112 are configured to deliver various fluids and/or gases toelectroless plating module 1101. Although electroless plating module1101 is depicted having seven injection pipes, it should be recognizedthat electroless plating module 1101 can include any number of injectionpipes. It should also be recognized that injection pipes 1100, 1102,1104, 1106, 1108, 1110, and 1112 can be formed from any convenientmaterial depending on the nature of the fluids and/or gases to bedelivered.

Additionally, any number of injection pipes 1100, 1102, 1104, 1106,1108, 1110, and 1112 include a nozzle to more uniformly deliver thevarious fluids and/or gases to electroless plating module 1101. Itshould be recognized, however, that injection pipes 1100, 1102, 1104,1106, 1108, 1110, and 1112 can include various shapes and/or attachmentsto enhance the uniformity of the delivery of fluids and/or gases. Forexample, injection pipes 1100, 1102, 1104, 1106, 1108, 1110, and 1112can include a diffuser.

In the present embodiment, wafer chuck 1120 and motor 1118 areconfigured to hold and to rotate wafer 1128 within electroless platingmodule 1101. More particularly, wafer chuck 1120 includes a plurality oflocks 1121 configured to hold wafer 1128 when rotated and to releasewafer 1128 when stopped. In one embodiment, locks 1121 can include anyconvenient centrifugal-force locks. Motor 1118 can include anyconvenient motor, such as a step motor, a DC motor, and the like.Additionally, motor 1118 includes rotation speed control and homingfunction.

In the following and preceding descriptions, various process steps havebeen described. It should be recognized that each of these steps, andcombination of steps, can be implemented as computer programinstructions. It should also be recognized that each of these steps, andcombination of steps, can be implemented by special purposehardware-based computer systems that perform the specified functions orsteps, or combination of special purpose hardware and computerinstructions.

As alluded to above, after wafer 1128 has been electroplated, wafer 1128can be replated to fix recesses 127 (FIG. 1B). The following is anexemplary process for replating wafer 1128 using electroless platingmodule 1101:

Step 1. Loading door 1124 moves to an open position.

Step 2. Robot 1122 loads wafer 1128 into electroless plating module1101.

Step 3. Loading door 1124 moves to a closed position.

Step 4. Chuck 1120 starts rotating wafer 1128. In one embodiment, chuck1120 rotates wafer 1128 at a speed between about 1 revolutions perminute to about 100 revolutions per minute, and preferably at about 20revolutions per minute.

Step 5. A cleaning solution is provided through injection pipe 1100. Inone embodiment, the cleaning solution is deionized water. The cleaningsolution can be provided for any convenient period of time to cleanwafer 1128. In one embodiment, wafer 1128 is cleaned for a period oftime between about 10 seconds to about 200 seconds, and preferably about30 seconds.

Step 6. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 7. After wafer 1128 has been dried, an electroless-plating solutionis provided through injection pipe 1112. This process can be performedfor any convenient period of time necessary to replate wafer 1128. Inone embodiment, wafer 1128 is electroless plated for a period of timebetween about a few seconds to about a few hundred seconds.Additionally, in one embodiment, during this process, wafer chuck 1120is rotated at about 1 revolutions per minute to about 100 revolutionsper minute, and preferably about 20 revolutions per minute.

Step 8. After wafer 1128 has been replated, a cleaning solution isprovided through injection pipe 1100. In one embodiment, the cleaningsolution is deionized water. Additionally, an etching solution isprovided on the back side of wafer 1128 (i.e., the side of wafer 1128that has not been plated) to clean any metal or other contaminants. Thecleaning solution can be provided for any convenient period of time toclean wafer 1128. In one embodiment, wafer 1128 is cleaned for a periodof time between about 10 seconds to about 200 seconds, and preferablyabout 30 seconds.

Step 9. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 10. After the wafer is dried, wafer chuck 1120 stops. Loading door1124 is then moved to an unload position, and wafer 1128 is removed fromelectroless plating module 1101.

As described earlier, after wafer 1128 has been replated, it can beplanarized. More particularly, with reference to FIGS. 1C and 1D, metallayer 126 that was replated on trenches 125 is planarized, and barrierlayer 122 is removed. In one embodiment described earlier, this processwas performed using a CMP process. With reference again to FIGS. 68A and68B, in the present exemplary embodiment, this process can be performedusing electroless plating module 1101:

Step 1. Loading door 1124 moves to an open position.

Step 2. Robot 1122 loads wafer 1128 into electroless plating module1101.

Step 3. Loading door 1124 moves to a closed position.

Step 4. Chuck 1120 starts rotating wafer 1128. In one embodiment, chuck1120 rotates wafer 1128 at a speed between about 1 revolutions perminute to about 100 revolutions per minute, and preferably at about 20revolutions per minute.

Step 5. A cleaning solution is provided through injection pipe 1100. Inone embodiment, the cleaning solution is deionized water. The cleaningsolution can be provided for any convenient period of time to cleanwafer 1128. In one embodiment, wafer 1128 is cleaned for a period oftime between about 10 seconds to about 200 seconds, and preferably about30 seconds.

Step 6. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 7. After wafer 1128 has been dried, an electroless-plating solutionis provided through injection pipe 1112. This process can be performedfor any convenient period of time necessary to replate wafer 1128. Inone embodiment, wafer 1128 is electroless plated for a period of timebetween about a few seconds to about a few hundred seconds.Additionally, in one embodiment, during this process, wafer chuck 1120is rotated at about 1 revolutions per minute to about 100 revolutionsper minute, and preferably about 20 revolutions per minute.

Step 8. After wafer 1128 has been replated, a cleaning solution isprovided through injection pipe 100. In one embodiment, the cleaningsolution is deionized water. Additionally, an etching solution isprovided on the back side of wafer 1128 (i.e., the side of wafer 1128that has not been plated) through injection pipe 1104. This helps toclean any metal or other contaminants from the back side of wafer 1128.The cleaning solution can be provided for any convenient period of timeto clean wafer 1128. In one embodiment, wafer 1128 is cleaned for aperiod of time between about 10 seconds to about 200 seconds, andpreferably about 30 seconds.

Step 9. After the front side of wafer 1128 (i.e., the side of wafer 1128that has been plated) has been cleaned, etching solution is providedthrough pipe 1114 to remove barrier layer 1122 (FIG. 1). This etchingprocess can be performed for any convenient period of time necessary toremove barrier layer 1122 (FIG. 1). It should be recognized that thisstep can be omitted when wafer 1128 does not have a barrier layer 1122.

Step 10. After wafer 1128 has been etched, a cleaning solution isprovided through injection pipes 1100 and 1104 to the front and backsides of wafer 1128.

Step 11. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 12. After wafer 1128 is dried, wafer chuck 1120 stops. Loading door1124 is then moved to an unload position, and wafer 1128 is removed fromelectroless plating module 1101.

As alluded to above, depending on the application, wafer 1128 caninclude a metal seed layer. When wafer 1128 includes a metal seed layer,it can be advantageous to remove this seed layer from the edges of wafer1128. In one embodiment of the present invention, electroless platingmodule 1101 can be used to remove the seed layer from the edges of wafer1128:

Step 1. Loading door 1124 moves to an open position.

Step 2. Robot 1122 loads wafer 1128 into electroless plating module1101.

Step 3. Loading door 1124 moves to a closed position.

Step 4. Chuck 1120 starts rotating wafer 1128. In one embodiment, chuck1120 rotates wafer 1128 at a speed between about 1 revolutions perminute to about 100 revolutions per minute, and preferably at about 20revolutions per minute.

Step 5. A cleaning solution is provided through injection pipe 1100. Inone embodiment, the cleaning solution is deionized water. The cleaningsolution can be provided for any convenient period of time to cleanwafer 1128. In one embodiment, wafer 1128 is cleaned for a period oftime between about 10 seconds to about 200 seconds, and preferably about30 seconds.

Step 6. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 7. After wafer 1128 has been dried, an electroless-plating solutionis provided through injection pipe 1112. This process can be performedfor any convenient period of time necessary to replate wafer 1128. Inone embodiment, wafer 1128 is electroless plated for a period of timebetween about a few seconds to about a few hundred seconds.Additionally, in one embodiment, during this process, wafer chuck 1120is rotated at about 1 revolutions per minute to about 100 revolutionsper minute, and preferably about 20 revolutions per minute.

Step 8. After wafer 1128 has been replated, a cleaning solution isprovided through injection pipe 1100. In one embodiment, the cleaningsolution is deionized water. Additionally, an etching solution isprovided on the back side of wafer 1128 (i.e., the side of wafer 1128that has not been plated) to clean any metal or other contaminants. Thecleaning solution can be provided for any convenient period of time toclean wafer 1128. In one embodiment, wafer 1128 is cleaned for a periodof time between about 10 seconds to about 200 seconds, and preferablyabout 30 seconds.

Step 9. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 10. After wafer 1128 has been dried, an etching solution can beprovided through injection pipe 1108 to remove the metal seed layer fromthe edge of wafer 1128.

Step 11. Cleaning and drying steps 8 and 9 can then be repeated.

Step 12. After the wafer is dried, wafer chuck 1120 stops. Loading door1124 is then moved to an unload position, and wafer 1128 is removed fromelectroless plating module 1101.

It should be recognized that the process for removing the metal seedlayer from wafer 1128 can be included with the process of planarizingwafer 1128. More particularly, an exemplary process is set forth below:

Step 1. Loading door 1124 moves to an open position.

Step 2. Robot 1122 loads wafer 1128 into electroless plating module1101.

Step 3. Loading door 1124 moves to a closed position.

Step 4. Chuck 1120 starts rotating wafer 1128. In one embodiment, chuck1120 rotates wafer 1128 at a speed between about 1 revolutions perminute to about 100 revolutions per minute, and preferably at about 20revolutions per minute.

Step 5. A cleaning solution is provided through injection pipe 1100. Inone embodiment, the cleaning solution is deionized water. The cleaningsolution can be provided for any convenient period of time to cleanwafer 1128. In one embodiment, wafer 1128 is cleaned for a period oftime between about 10 seconds to about 200 seconds, and preferably about30 seconds.

Step 6. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 7. After wafer 1128 has been dried, an electroless-plating solutionis provided through injection pipe 1112. This process can be performedfor any convenient period of time necessary to replate wafer 1128. Inone embodiment, wafer 1128 is electroless plated for a period of timebetween about a few seconds to about a few hundred seconds.Additionally, in one embodiment, during this process, wafer chuck 1120is rotated at about 1 revolutions per minute to about 100 revolutionsper minute, and preferably about 20 revolutions per minute.

Step 8. After wafer 1128 has been replated, a cleaning solution isprovided through injection pipe 1100. In one embodiment, the cleaningsolution is deionized water. Additionally, an etching solution isprovided on the back side of wafer 1128 (i.e., the side of wafer 1128that has not been plated) through injection pipe 1104. This helps toclean any metal or other contaminants from the back side of wafer 1128.The cleaning solution can be provided for any convenient period of timeto clean wafer 1128. In one embodiment, wafer 1128 is cleaned for aperiod of time between about 10 seconds to about 200 seconds, andpreferably about 30 seconds.

Step 9. After the front side of wafer 1128 (i.e., the side of wafer 128that has been plated) has been cleaned, etching solution is providedthrough pipe 1114 to remove barrier layer 1122 (FIG. 7). This etchingprocess can be performed for any convenient period of time necessary toremove barrier layer 1122 (FIG. 7). It should be recognized that thisstep can be omitted when wafer 1128 does not have a barrier layer 1122.

Step 10. Before, during or after wafer 1128 is etched, an etchingsolution can be provided through injection pipe 1108 to remove the metalseed layer from the edge of wafer 1128.

Step 11. After wafer 1128 has been etched, a cleaning solution isprovided through injection pipes 1100 and 1104 to the front and backsides of wafer 1128.

Step 12. After wafer 1128 has been cleaned, a drying gas is providedthrough injection pipe 1102. In one embodiment, the drying gas isNitrogen gas. This process can be performed for any convenient period oftime necessary to dry wafer 1128. In one embodiment, wafer 1128 is driedfor a period of time between about 20 seconds to about 40 seconds, andpreferably about 30 seconds. Additionally, in one embodiment, duringthis process, wafer chuck 1120 is rotated at about 1500 revolutions perminute to about 3500 revolutions per minute, and preferably about 2500revolutions per minute.

Step 13. After wafer 1128 is dried, wafer chuck 1120 stops. Loading door1124 is then moved to an unload position, and wafer 1128 is removed fromelectroless plating module 1101.

As alluded to earlier, electroless plating module 1101 can be integratedinto a wafer processing tool. With reference to FIGS. 70A, 70B, and 70C,a wafer processing tool 2010 in accordance with one exemplary embodimentof the present invention is shown. In this embodiment, wafer processingtool 2010 includes an electropolishing station 2000, an electrolessplating station 2100, wafer handling stations 2200 and 2210, and a robot2220.

As depicted in FIG. 70B, electropolishing station 2000 includes fivestacked electropolishing receptacles (modules) 2020. Electroless platingstation 2100 includes five stacked electroless plating modules 2120.Accordingly, as many as five wafers can be electropolished and/orelectroless plated at one time. It should be recognized, however, thatelectropolishing station 2000 and electroless plating station 2100 caninclude any number of electropolishing modules and electroless platingmodules depending on the particular application. For example, for a lowvolume application, electropolishing station 2000 and electrolessplating station 2100 can be configured with one electropolishing module2020 and one electroless plating module 2120. Additionally, it should berecognized that the ratio of electropolishing modules 2020 toelectroless plating modules 2120 can vary depending on the particularapplication. For example, in an application where the electropolishingprocess requires more processing time than the electroless platingprocess, wafer processing tool 2010 can be configured with moreelectropolishing modules 2020 than electroless plating modules 2120.Alternatively, in applications where the electroless plating processrequires more processing time than the electropolishing process, waferprocessing tool 2010 can be configured with more electroless platingmodules 2120 than electropolishing modules 2020.

As also depicted in FIG. 70B, electropolishing modules 2020 andelectroless plating modules 2120 are configured as vertical stacks. Inthis manner, the number of wafers processed can be increased withoutincreasing the footprint of (the amount of floor space occupied by)wafer processing tool 2010. In the increasingly competitivesemiconductor industry, increasing the ratio of wafers processed persquare feet of fabrication spaced occupied by wafer processing tool 2010can be advantageous.

In the present embodiment, wafer processing tool 2010 includeswafer-handling stations 2200 and 2210. More particularly, wafer-handlingstations 2200 and 2210 can include a wafer cassette 2160 for holdingwafers. In one embodiment, wafer cassette 2160 can include a standardmechanical interface (SMIF) 2320. It should be recognized that wafercassette 216 can include any convenient wafer holding and/or carrierapparatus.

In the present embodiment, robot 2220 is configured to remove anunprocessed wafer from wafer cassette 2160 and transport the wafer toany one of the electropolishing modules 2020. After the wafer iselectropolished, robot 2220 transports the wafer to any one of theelectroless plating modules 2120. After the wafer is plated, etched,cleaned, and tried, robot 2220 then transports the wafer back to wafercassette 2160. Although a single wafer cassette 2160 is depicted in FIG.70, it should be recognized that wafer-handling stations 2200 and 2210can include any number of wafer cassettes 2160.

Additionally, wafer-handling station 2200 and 2210 can include variousconfigurations depending on the particular application. For example,wafer-handling station 2200 and 2210 can each include at least one wafercassette 2160. In one configuration, a wafer cassette 2160 containingunprocessed wafers is provided at wafer-handling station 2200. Thewafers are removed, processed, then returned to the same wafer cassette2160 at wafer-handling station 2200. Prior to the completion of theprocessing of wafers from wafer cassette 2160 at wafer-handling station2200, another wafer cassette 2160 containing unprocessed wafers isprovided at wafer-handling station 2210. Once the wafers from wafercassette 2160 at wafer-handling station 2200 are processed,wafer-processing tool 2010 can begin processing the unprocessed wafersfrom wafer cassette 2160 at wafer-handling station 2210. The processedwafers in wafer cassette 2160 at wafer-handling station 2200 can then beremoved and replaced with yet another wafer cassette 2160 containingunprocessed wafers. In this manner, wafer-processing tool 2010 can beoperated continuously without unintended interruption.

In another configuration, a wafer cassette 2160 containing unprocessedwafer can be provided at wafer-handling station 2200. An empty wafercassette 2160 can be provided at wafer-handling station 2210. Theunprocessed wafers from wafer cassette 2160 at wafer-handling station2200 can be processed then returned to the empty wafer cassette 2160 atwafer-handling station 2210. This configuration also facilitatescontinuously operation of processing tool 2010. This configuration,however, has the advantage that one of the two handling stations 2200and 2210 can be designated for unprocessed wafers and the other forprocessed wafers. In this manner, an operator or a robot is less likelyto mistake a wafer cassette 2160 containing processed wafers for onewith unprocessed wafers and vice versa.

With reference again to FIGS. 70B and 70C, wafer-processing tool 2010includes housing unit 2300 for housing the various electrical andmechanical components of wafer-processing tool 2010, such as powersupplies, filters, wires, plumbing, chemical containers, pumps, valves,and the like. Wafer-processing tool 2010 can also include a computer2040 for controlling the operation of wafer-processing tool 2040. Moreparticularly, computer 2040 can be configured with an appropriatesoftware program to implement the processing steps set forth above.

It should be recognized that various modifications can be made to theconfiguration of wafer-processing tool 2010 without deviating from thespirit and/or scope of the present invention. In this regard, in thefollowing description and associated drawings, various alternativeembodiments of the present invention will be described and depicted. Itshould be recognized, however, that these alternative embodiments arenot intended to demonstrate all of the various modifications, which canbe made to the present invention. Rather, these alternative embodimentsare provided to demonstrate only some of the many possiblemodifications.

With reference to FIGS. 71A, 71B, and 71C, a wafer processing tool 4010in accordance with another exemplary embodiment of the present inventionis shown. In this embodiment, wafer processing tool 4010 includes anelectroplating station 4000, an electroless plating station 4100, anelectropolishing station 4500, wafer handling stations 4420, 4440, and4460, and robots 4220 and 4400.

In the present embodiment, robot 4220 is configured to remove anunprocessed wafer from wafer handling station 4420, 4440, or 4460. Robot4220 transports the wafer into any one of the electroplating modules4020 in electroplating station 4000. In electroplating modules 4020,metal layer 121 (FIG. 1A) can be formed on barrier layer 122 (FIG. 1A)or on dielectric layer 123 (FIG. 1A) using an electroplating process.This process is described in greater detail in copending applicationSer. No. 09/232,864, entitled PLATING APPARATUS AND METHOD, filed onJan. 15, 1999, the entire content of which is incorporated herein byreference. It should be recognized that although three electroplatingmodules 4020 are depicted in FIG. 71, wafer processing tool 4010 caninclude any number of electroplating modules 4020.

After the wafer is plated, robot 4220 transports the wafer into any oneof the electroless plating modules 4120 in electroless plating station4100. In electroless plating module 4120, the wafer is cleaned, but notreplated. Robot 4400 then transports the wafer into any one of theelectropolishing modules 4520 in electropolishing station 4500. Inelectropolishing module 4520, the wafer is electropolished. Robot 4400then transports the wafer back into electroless plating module 4120. Atthis point, the wafer is replated, etched, cleaned, and dried. Robot4220 then returns the wafer to wafer handling station 4420, 4440, or4460.

With reference now to FIGS. 72A, 72B, and 72C, a wafer processing tool5001 in accordance with still another exemplary embodiment of thepresent invention is shown. In this embodiment, wafer processing tool5001 includes electroplating modules 5000, 5002, and 5004, cleaningmodules 5010, 5012, and 5014, thermal annealing modules 5020, 5022, and5024, and electropolishing modules 5030, 5032, and 5034.

As depicted in FIGS. 72B and 72C, wafer processing tool 5001 includessupport tables 5300, 5500, and 5700, which are supported by supportmembers 5150 and 5150. Each support table includes an electroplatingmodule, a cleaning module, a thermal annealing module, and anelectropolishing module. More particularly, support table 5300 includeselectroplating module 5000, cleaning module 5010, thermal annealingmodule 5020, and electropolishing module 5030. Support table 5500includes electroplating module 5002, cleaning module 5012, thermalannealing module 5022, and electropolishing module 5032. Support table5700 includes electroplating module 5004, cleaning module 5014, thermalannealing module 5024, and electropolishing module 5034.

As also depicted in FIGS. 72B and 72C, wafer processing tool 5001includes rotary tables 5200, 5400, and 5600, which are supported bysupport member 5140. Each rotary table 5200, 5400, and 5600 includesfour wafer chuck mechanisms. More particularly, rotary table 5200includes wafer chuck mechanisms 5100, 5104, 5106, and 5108. Rotary table5400 includes wafer chuck mechanisms 5110, 5114, 5116, and 5108. Rotarytable 5600 includes wafer chuck mechanisms 5120, 5124, 5126, and 5128.

A motor 5048 rotates support member 5140, which then rotates rotarytables 5200, 5400, and 5600. Bearings 5042, 5044, and 5046 allow supporttables 5300, 5500, and 5700 to remain stationary. As such, as the rotarytables rotate around the support tables, the wafer held by the waferchuck mechanisms can be processed in each of the processing modules(i.e., the electroplating module, cleaning module, thermal annealingmodule, and electropolishing module) on each the support table.

More particularly, with reference to FIG. 72A, a robot 5080 transportswafers from wafer handling station 5082, 5084, or 5086 to pre-aligner(not shown). Robot 5080 then transports the wafers into the threestacked wafer chuck mechanisms (FIGS. 5B and 5C). For example, withreference to FIG. 72C, robot 5080 (FIG. 5A) can transport unprocessedwafers into wafer chuck mechanisms 5100, 5110, and 5120.

With reference to FIGS. 72B and 72C, rotary table 5200, 5400, and 5600then rotate wafer chuck mechanisms 5100, 5110, and 5120 toelectroplating modules 5000, 5002, and 5004. As these wafers are beingelectroplated, robot 5080 (FIG. 72A) can transport more unprocessedwafers into the wafer chuck mechanisms 5108, 5118, and 5128.

After the wafers are electroplated, rotary table 5200, 5400, and 5600then rotate wafer chuck mechanisms 5100, 5110, and 5120 to cleaningmodules 5010, 5012, and 5014. At the same time wafer chuck mechanisms5108, 5118, and 5128 rotate to electroplating modules 5000, 5002, and5004. Also, wafer chuck mechanisms 5106, 5116, and 5126 rotate toreceive unprocessed wafers from robot 5080 (FIG. 72A).

After the wafers are cleaned, rotary table 5200, 5400, and 5600 thenrotate wafer chuck mechanisms 5100, 5110, and 5120 to thermal annealingmodules 5020, 5022, and 5024. At the same time, wafer chuck mechanisms5108, 5118, and 5128 rotate to cleaning modules 5010, 5012, and 5014.Also, wafer chuck mechanisms 5106, 5116, and 5126 rotate toelectroplating modules 5000, 5002, and 5004. Furthermore, wafer chuckmechanisms 5104, 5114, and 5124 rotate to receive unprocessed wafer fromrobot 5080 (FIG. 72A).

In thermal annealing modules 5020, 5022, and 5024, the metal layerwithin the trenches and/or vias of the wafer are annealed to produce amore uniform crystal structure. Annealing the wafer in this manner hasthe advantage that the electrical characteristics of the metal layerwithin the trenches and/or vias will be more stable. Otherwise, theelectrical characteristics of the metal layer within the trenches and/orvias can change as the metal layer naturally anneals over a period oftime after processing of the wafer. Additionally, annealing the waferprior to electropolishing can facilitate a more planar wafer surface.Otherwise, the surface of the metal layer within the trenches and/orvias can change as the metal layer naturally anneals over a period oftime after processing of the wafer.

After the wafers are annealed, rotary table 5200, 5400, and 5600 thenrotate wafer chuck mechanisms 5100, 5110, and 5120 to electropolishingmodules 5030, 5032, and 5034. At the same time, wafer chuck mechanisms5108, 5118, and 5128 rotate to thermal annealing modules 5020, 5022, and5024. Also, wafer chuck mechanisms 5106, 5116, and 5126 rotate tocleaning modules 5010, 5012, and 5014. Furthermore, wafer chuckmechanisms 5104, 5114, and 5124 rotate to electroplating modules 5000,5002, and 5004.

After the wafers are electropolished, robots 5040, 5042, and 5044transport the wafers from chuck mechanisms 5100, 5110, and 5120 toelectroless plating modules 5070, 5072, and 5074. As depicted in FIG.72B, robots 5040, 5042, and 5044 are supported on support tables 5302,5502, and 5702, respectively, which are supported by support member5046. Also, electroless plating modules 5070, 5072, and 5074 aresupported on support tables 5304, 5504, and 5704, respectively, whichare supported by support members 5078.

After the wafers are removed from chuck mechanisms 5100, 5110, and 5120,rotary table 5200, 5400, and 5600 rotate to repeat the entire process.Also, when the wafers are replated, etched, cleaned, and dried, they areremoved from electroless plating modules 5070, 5072, and 5074 andtransported to wafer handling station 5082, 5084, or 5086 (FIG. 5A) byrobot 5080 (FIG. 72A).

Wafer processing tool 5001 also includes a metrology station 5088, whichcan include various tools to inspect and examine the wafer during orafter processing for quality control and to tune the various waferprocessing systems. For example, metrology station 5088 can includefour-point probes for measuring resistivity of the metal layer afterelectroplating. Metrology station 5088 can also include a scanningtunneling microscope (STM) or an atomic force microscope (AFM) formeasuring the surface profile of the wafer. Metrology station 5088 canfurther include an optical microscope for measuring surface defects onthe wafer. It should be recognized that metrology station 5088 caninclude any combination of these tools or various additional toolsdepending on the application.

Wafer processing tool 5001 can also include various additionalprocessing stations depending on the particular application. Forexample, wafer processing tool 5001 can include a dry or plasmastripping chamber. As described above, when the wafer includes a barrierlayer, it is stripped away from the surface of the wafer. Dry or plasmastripping has the advantage that it does not produce many of thecorrosion problems generally associated with wet etching.

As stated earlier, although the present invention has been described inconjunction with a number of alternative embodiments illustrated in theappended drawing figures, various modifications can be made withoutdeparting from the spirit and/or scope of the present invention.Therefore, the present invention should not be construed as beinglimited to the specific forms shown in the drawings and described above.

1. An apparatus for monitoring the end-point of an electroplishingprocess of a metal layer formed on a wafer, comprising: a wafer chuckconfigured to rotate the wafer; a nozzle configured to electroplish themetal layer, wherein the nozzle is configured to apply a stream ofelectrolyte to a portion of the metal layer as the wafer is rotated; andan end-point detector disposed adjacent to the nozzle, wherein theend-point detector is configured to detect a thickness of the metallayer on a portion of the metal layer as the wafer is rotated.
 2. Theapparatus of claim 1, wherein the nozzle is stationary, and wherein thewafer chuck is configured to translate the wafer as the wafer is rotatedto expose to metal layer to the stationary nozzle and the end-pointdetector.
 3. The apparatus of claim 2, wherein a signal from theend-point detector is used to control the speed of the rotation andmovement of the wafer.
 4. The apparatus of claim 2, wherein a signalfrom the end-point detector is used to control the polishing power andpolishing rate.
 5. The apparatus of claim 1, wherein the nozzle and toend-point detector are moveable to expose the metal layer to themoveable nozzle and the end-point detector.
 6. The apparatus of claim 1,wherein an end-point detector comprises: a first sensor configured tomeasure the thickness of the metal layer during electropolishing; and asecond sensor configured to measure the thickness of the metal layerafter electropolishing.
 7. The apparatus of claim 6 further comprising:a third sensor configured to measure the thickness of the metal layerbefore electropolishing.
 8. The method of claim 1, wherein measuring athickness comprises: measuring the thickness of the metal layer duringelectropolishing; and measuring the thickness of the metal layer afterelectropolishing.
 9. The method of claim 8 further comprising: measuringthe thickness of the metal layer before electropoishing.
 10. Anapparatus for monitoring the end-point of an electroplishing process ofa metal layer formed on a wafer, comprising: a wafer chuck tat rotatesand translates the wafer; a nozzle that applies a stream of electrolyteto a portion of the metal layer as the wafer is rotated and translated,wherein the nozzle is stationary; and an end-point detector adjacent tothe nozzle that measures a thickness of the metal layer on a portion ofthe metal layer as the wafer is rotated and translated.
 11. Theapparatus of claim 10, wherein a signal from the end-point detector isused to control the speed of the rotation and movement of the wafer. 12.The apparatus of claim 10, wherein a signal from the end-point detectoris used to control the polishing power and polishing rate.
 13. Theapparatus of claim 10, wherein the end-point detector measures thethickness of the metal layer after electropolishing.
 14. The apparatusof claim 13, wherein the end-point detector measures the thickness ofthe metal layer before and during electropolishing.
 15. A method formonitoring the end-point of an electroplishing process of a metal layerformed on a wafer, comprising: rotating the wafer; electropolishing themetal layer using a nozzle to apply a stream of electrolyte to a portionof the metal layer as the wafer is rotated; and measuring a thickness ofthe metal layer on a portion of the metal layer using an end-pointdetector adjacent to the nozzle.
 16. The method of claim 15 furthercomprising: translating the wafer as the wafer is rotated to expose themetal layer to the stationary nozzle and the end-point detector.
 17. Themethod of claim 16, wherein the wafer is rotated and translated whilethe nozzle is held stationary.
 18. The method of claim 16 furthercomprising: controlling the speed of the rotation and movement of thewafer using a signal from the end-point detector.
 19. The method ofclaim 16 further comprising: controlling the polishing power andpolishing rate of the wafer using a signal from the end-point detector.20. The method of claim 16 further comprising: moving the nozzle and theend-point detector to expose the metal layer to the moveable nozzle andthe end-point detector.